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LTM8045 Datasheet(PDF) 34 Page - Analog Devices

Part # LTM8045
Description  EN55022B Compliant 40V, Dual 4A or Single 8A Step-Down or 50W Inverting 關Module Regulator
PDF  54 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM8045 Datasheet(HTML) 34 Page - Analog Devices

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LTM4655
34
Rev. 0
For more information www.analog.com
body diode that creates a diode-drop of reverse polarity
(positive voltage) on VOUTn–, as shown in Figure 49. The
voltage excursion is highest when RUN
n toggles high
because that is the instant when INTVCCn powers-up, with
a corresponding increase in ISVINn/ISVOUTn–/ILn current
flow. With higher current flow, the forward voltage drop
(VF) of MBn’s body diode—and thus, the positive voltage
excursion on VOUTn– is higher.
If this transient voltage excursion is unwelcome for the
load or polarized output capacitors, minimize it with a
low VF Schottky diode that straddles VOUTn– and VOUTn+
(see Figure  48 circuit and Figure  49 performance).
Additionally, the voltage excursion can be empirically
reduced by increasing output capacitance.
Lastly: in applications where it is anticipated that VINn
may be rapidly applied (e.g., <10μs) and CINOUTn is
used, the resulting capacitor-divider network formed by
CINOUTn and CINLn||CINHn may transiently drag VOUTn–
positive. It is recommended to apply a low VF Schottky
diode from VOUTn– to VOUTn+ in such applications. The
reverse mechanism applies, as well: in applications where
it is anticipated that VINn may be rapidly discharged and
CINOUTn is used, the resulting capacitor-divider network
formed by CINOUTn and CINLn||CINHn may transiently drag
VOUTn– excessively negative. It is recommended to strad-
dle VOUTn– and VOUTn+ with a TVS diode, if output voltage
excursions during VINn-discharge are anticipated.
APPLICATIONS INFORMATION
Frequency Adjustment, Negative-VOUT– Operation
The default switching frequency (fSWn) of channel n of the
LTM4655 is 400kHz. This is suitable for mainly low-VIN or
low-VOUT– applications (VINn < 5V or |VOUTn–| < 5V). For
a practical design, the LTM4655’s inductor ripple current
(∆nPK–PK) is suggested to be less than ~2APK–PK. From
Equation 20, it follows that fSW should be chosen such
that Equation 26).
fSWn =
1
Ln • ∆InPK-PK •
1
VINn
–
1
VOUTn –
⎛
⎝⎜
⎞
⎠⎟
(26)
In some cases, the value of fSWn yielded by Equation 26
violates the supported minimum on-time of the LTM4655
(see Equation 21). If this occurs, choose fSWn instead
according to Equation 12.
The primary consequence of using a lower switching fre-
quency than that dictated by Equation 26 is that the output
current capability of the LTM4655 is reduced, according
to Equation 23.
To configure the channel
n of the LTM4655 for a higher
switching frequency than 400kHz default, apply a resistor,
RfSETn, between the fSETn pin and SVOUTn–. RfSETn is given
(in MΩ) by Equation 13.
The relationship of RfSETn to programmed fSWn is shown
in Figure 1.
See Table 1 and Table 12 for Recommended fSWn and
associated RfSETn values for various combinations of VINn
and VOUTn–.
Table 1. Recommended Channel
n Switching Frequency (fSWn) and RfSETn for Common Combinations of VINn and VOUTn–,
Negative-VOUTn– Operation
VOUTn– (V)
–0.5
–3.3
–5
–8
–12
–15
–20
–24
3.6
400kHz,
No RfSETn
400kHz,
No RfSETn
400kHz,
No RfSETn
400kHz,
No RfSETn
400kHz,
No RfSETn
400kHz,
No RfSETn
425kHz,
4.3MΩ
450kHz,
2.2MΩ
5
450kHz,
2.2MΩ
475kHz,
1.3MΩ
500kHz,
1MΩ
525kHz,
806kΩ
550kHz,
665kΩ
12
550kHz,
665kΩ
700kHz,
332kΩ
825kHz,
237kΩ
875kHz,
210kΩ
900kHz,
200kΩ
1MHz,
165kΩ
24
Drive CLKINn with a 200kHz
Clock, No RfSETn
450kHz,
2.2MΩ
600kHz,
499kΩ
800kHz,
249kΩ
1.1MHz,
143kΩ
1.2MHz,
124kΩ
N/A
N/A
36
Not Recommended Due to
On-Time Criteria Violation
500kHz,
1MΩ
N/A Due to SOA Criteria Violation



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