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LTM8045 Datasheet(PDF) 9 Page - Analog Devices

Part # LTM8045
Description  EN55022B Compliant 40V, Dual 4A or Single 8A Step-Down or 50W Inverting 關Module Regulator
PDF  54 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM8045 Datasheet(HTML) 9 Page - Analog Devices

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LTM4655
9
Rev. 0
For more information www.analog.com
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LDOIN(DC)
LDO Input DC Voltage
l
4.5
40
V
VLDOOUT(DC)
LDO Output Voltage
VLDOIN = 36V, 0mA ≤ ILDOOUT ≤ 25mA
VLDOIN = 4.5V, 0mA ≤ ILDOOUT ≤ 20mA
l
l
4.8
2.7
5.0
4.1
5.2
V
V
VLDOOUT(AC)
Output Voltage Ripple
2
mVP-P
ILDOOUT(OCL)
Output Current Limit, 5V LDO
LDOIN = 36V
140
mA
Clock Generator
∆fOUT
Clock-Generator Frequency Accuracy
2.7V ≤ LDOOUT ≤ 5.2V, 200kHz ≤ fOUT ≤ 3MHz,
MOD Connected to CLKOUT2
l
±2.5
±2.5
±7.5
±3
%
%
RCLKSET(RANGE) Frequency Setting Resistor Range
RCLKSET Resistance for Which –7.5% ≤ ∆fOUT ≤
7.5%, Over 2.7V ≤ LDOOUT ≤ 5.2V,
MOD Electrically Connected to CLKOUT2
l
33.2
499
kΩ
Period Variation (Frequency Spreading)
LDOOUT = 5V, RCLKSET = 100kΩ, MOD Open Circuit
±10
%
Duty Cycle
2.7V ≤ LDOOUT ≤ 5.2V, 200kHz ≤ fOUT ≤ 3MHz,
MOD Electrically Connected to CLKOUT2
l
40
60
%
θCLKOUT1/
θCLKOUT2
Phase Relationship of CLKOUT2 to
CLKOUT1
2.7V ≤ LDOOUT ≤ 5.2V, 200kHz ≤ fOUT ≤ 3MHz,
MOD Electrically Connected to CLKOUT2
180
Deg
VOH_CLKOUTn
CLKOUT
n Output Voltage, Logic High
CLKOUT
n VOH Measured with Respect to LDOOUT,
2.7V ≤ LDOOUT ≤ 5.2V, ICLKOUTn = –100μA
–0.4
V
VOL_CLKOUTn
CLKOUT
n Output Voltage, Logic Low
CLKOUT
n VOL Measured with Respect to GND, 2.7V
≤ LDOOUT ≤ 5.2V, ICLKOUTn = 100μA
0.4
V
Temperature Sensor
∆VTEMP
Temperature Sensor Forward Voltage,
VTEMP+ to VTEMP–
ITEMP+ = 100µA and ITEMP– = –100μA at TA = 25°C
0.598
V
TC∆V(TEMP)
∆VTEMP Temperature Coefficient
–2.0
mV/°C
η
Ideality Factor
1.004
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified internal
operating temperature range (Note 2). TA = 25°C, Test Circuit 3 and voltages referred to GND unless otherwise noted.
Note 1: Stresses beyond those listing under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating conditions for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4655 is tested under pulsed load conditions such that TJ ≈
TA. The LTM4655E is guaranteed to meet performance specifications over the
0°C to 125°C internal operating temperature range. Specifications over the full
–40°C to 125°C internal operating temperature range are assured by design,
characterization and correlation with statistical process controls.
The LTM4655I is guaranteed to meet specifications over the full –40°C to
125°C internal operating temperature range. The LTM4655MP is tested and
guaranteed over the full –55°C to 125°C operating temperature range. Note
that the maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board layout,
the rated package thermal resistance and other environmental factors.
Note 3: See output current derating curves for different VIN, VOUT, and TA,
located in the Applications Information section.
Note 4: Minimum on-time, PGOOD delay, and EXTVCCn switchover
threshold are tested at wafer sort.
Note 5: The two power inputs—VIN1 and VIN2—and their respective power
outputs—VOUT1+ or VOUT1–, and VOUT2+ or VOUT2–, depending on operational
configuration—are tested independently in production, in both positive-VOUT
(noninverting step-down) and negative-VOUT– (inverting buck-boost) configurations.
On occasion, a shorthand notation is used in this document that allows VINn torefer
to both VIN1 and VIN2 by virtue of n being permitted to take on a value of 1 or 2. This
italicized
n notation and convention is extended to all such pin names.
Note 6: To ensure minimum on-time criteria is met, VOUTn (0.5VDC)+ high
line regulation is tested at 13.2VIN, with fSETn and CLKINn open circuit.
VOUTn (–0.5VDC)– low line regulation is tested at 3.6VIN, with fSETn and
CLKIN
n open circuit.
VOUTn (–0.5VDC)– high line regulation is tested at 28VIN, and with CLKINn
driven at 200kHz—so as to ensure minimum on-time criteria is met.
The LTM4655 is not recommended for applications where the minimum
on-time criteria (guardband to 90ns) is continuously violated. The
LTM4655 can ride through events (such as VIN surge) where the on-time
criteria is transiently violated. See the Applications Information section.
Note 7: See the Applications Information section for dropout criteria.
Note 8: VOUTn (–24VDC)– is tested at 3.6VIN and 16VIN, with CLKINn
driven with a 1.8MHz clock, ISET
na to SVOUTn– = 12V, and RfSET = 57.6k.
It is also tested at 12VIN, with CLKINn driven with a 1.5MHz clock, RfSETn
= 57.6k, and RISETn = 480k.
Note 9: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 10: The INTVCCn Abs Max peak output current is specified as the sum
of current drawn by circuits internal to the module biased off of INTVCCn
and current drawn by external circuits biased off of INTVCCn. Specified
independently, for each channel. See the Applications Information section.



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