AD9699 datasheet(2/121 Pages) AD

2 / 121 page

Data Sheet

AD9699

TABLE OF CONTENTS

analog.com

Rev. 0 | 2 of 121

Features................................................................ 1

Applications........................................................... 1

Functional Block Diagram......................................1

General Description...............................................3

Product Highlights.............................................. 3

Specifications........................................................ 4

DC Specifications............................................... 4

AC Specifications............................................... 5

Digital Specifications.......................................... 7

Switching Specifications.....................................8

Timing Specifications......................................... 8

Absolute Maximum Ratings.................................10

Thermal Resistance......................................... 10

ESD Caution.....................................................10

Pin Configuration and Function Descriptions.......11

Typical Performance Characteristics................... 13

Equivalent Circuits...............................................19

Theory of Operation.............................................21

ADC Architecture..............................................21

Analog Input Considerations............................ 21

Voltage Reference............................................24

DC Offset Calibration....................................... 24

Clock Input Considerations.............................. 25

Power-Down/Standby Mode.............................27

Temperature Diode...........................................27

ADC Overrange and Fast Detect.........................29

ADC Overrange................................................29

Fast Threshold Detection (FD)......................... 29

ADC Application Modes and JESD204B Tx

Converter Mapping............................................ 30

Programmable FIR Filters................................... 31

Supported Modes.............................................31

Programming Instructions................................ 32

Digital Downconverter (DDC).............................. 33

DDC I/Q Output Selection................................ 33

DDC General Description.................................33

DDC Frequency Translation.............................35

DDC Decimation Filters....................................43

DDC Gain Stage...............................................48

DDC Complex to Real Conversion...................48

DDC Mixed Decimation Settings...................... 50

DDC Example Configurations.......................... 51

DDC Power Consumption................................ 53

Signal Monitor......................................................54

SPORT over JESD204B.................................. 54

Digital Outputs..................................................... 56

Introduction to the JESD204B Interface........... 56

JESD204B Overview........................................56

Functional Overview.........................................57

JESD204B Link Establishment.........................57

Physical Layer (Driver) Outputs....................... 59

fS × 4 Mode...................................................... 60

Setting Up the AD9699 Digital Interface...........62

Deterministic Latency.......................................... 68

Subclass 0 Operation.......................................68

Subclass 1 Operation.......................................68

Multichip Synchronization....................................70

Normal Mode....................................................70

Timestamp Mode..............................................70

SYSREF Input..................................................71

SYSREF± Setup/Hold Window Monitor........... 73

Latency................................................................ 76

End to End Total Latency................................. 76

Example Latency Calculations......................... 76

LMFC Referenced Latency.............................. 76

Test Modes.......................................................... 78

ADC Test Modes.............................................. 78

JESD204B Block Test Modes...........................79

Serial Port Interface.............................................81

Configuration Using the SPI............................. 81

Hardware Interface...........................................81

SPI Accessible Features.................................. 81

Memory Map........................................................82

Reading the Memory Map Register Table........ 82

Memory Map Register Details.......................... 82

Applications Information.................................... 119

Power Supply Recommendations.................. 119

Layout Guidelines...........................................119

AVDD1_SR (Pin E7) and AGND (Pin E6

and Pin E8)...................................................120

Outline Dimensions........................................... 121

Ordering Guide...............................................121

Evaluation Boards.......................................... 121

REVISION HISTORY

5/2021—Revision 0: Initial Version

AD9699 Datasheet(PDF) 2 Page - Analog Devices

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