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ADF7024 Datasheet(PDF) 1 Page - Analog Devices |
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ADF7024 Datasheet(HTML) 1 Page - Analog Devices |
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1 / 24 page ![]() Easy to Use, Low Power, Sub GHz, ISM/SRD, FSK/GFSK, Transceiver IC Data Sheet ADF7024 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Radio frequency (RF) bands: 431 MHz to 435 MHz and 862 MHz to 928 MHz Data rates supported: 9.6 kbps, 38.4 kbps, 50 kbps, 100 kbps, 200 kbps, and 300 kbps Modulation: two-level frequency (FSK) and Gaussian frequency (GFSK) shift keying 2.2 V to 3.6 V power supply Ultralow power sleep modes for long battery life Simple serial port interface (SPI) control interface Fast radio state transitions Automatic frequency control (AFC) and automatic gain control (AGC) Digital received signal strength indication (RSSI) Fully integrated low noise RF synthesizer and transmit (Tx)/receive (Rx) switch Image rejection calibration (U.S. Patent 8,238,865 and U.S. Patent 8,358,993) Integrated packet management support Insertion/detection of preamble/sync word/cyclic redundancy check (CRC) Manchester and 8-bit/10-bit data encoding and decoding Data whitening 240-byte packet buffer for Tx/Rx data Smart wake mode (SWM) Autonomous carrier sense, packet sniffing, and reception Integrated battery alarm and temperature sensor Integrated RC oscillator On-chip, 8-bit analog-to-digital converter (ADC) 5 mm × 5 mm, 32-lead LFCSP Receiver performance Highly linear: −11.5 dBm input IP3 Blocking: 76 dB at 10 MHz offset Receiver sensitivity, bit error rate (BER) −111 dBm at 9.6 kbps −105 dBm at 100 kbps Low power: 12.8 mA in Rx Transmitter performance High efficiency power amplifier (PA): 23.3 mA in Tx at 10 dBm Output power range: −20 dBm to +13.5 dBm Output power resolution: 0.5 dB Low power mode performance 0.33 μA in PHY_SLEEP mode (Deep Sleep Mode 1) 0.75 μA in PHY_SLEEP mode (32 kHz RC oscillator active) 11.75 μA autonomous Rx sniff using SWM, 300 kbps Supported regulations ETSI EN 300 220 FCC Part 15.231, Part 15.247, Part 15.249 APPLICATIONS Wireless sensor networks (WSNs) Home and building automation sset tracking Process and building control Industrial control Internet of Things (IoT) FUNCTIONAL BLOCK DIAGRAM Figure 1. LNA SCLK MOSI MISO CS IRQ_GP3 RFI_N RFI_P RFO SPI IRQ CTRL DIGITAL BASEBAND, PACKET HANDLER, AND MEMORY BIAS 26MHz OSC SMART WAKE CONTROLLER TEMPERATURE SENSOR BATTERY MONITOR PA 32kHz RC OSC ADF7024 GPx GPx XOSC26P, XOSC26N RBIAS CREGx SYNTHESIZER LOW IF RECEIVER TRANSMITTER 2 |
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