Electronic Components Datasheet Search
  English  ▼

X  

TRF1221 Datasheet(PDF) 10 Page - Texas Instruments

Part # TRF1221
Description  Dual VCO/PLL Synthesizer With IF Up-Converter
PDF  26 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TRF1221 Datasheet(HTML) 10 Page - Texas Instruments

Back Button TRF1221 Datasheet HTML 6Page - Texas Instruments TRF1221 Datasheet HTML 7Page - Texas Instruments TRF1221 Datasheet HTML 8Page - Texas Instruments TRF1221 Datasheet HTML 9Page - Texas Instruments TRF1221 Datasheet HTML 10Page - Texas Instruments TRF1221 Datasheet HTML 11Page - Texas Instruments TRF1221 Datasheet HTML 12Page - Texas Instruments TRF1221 Datasheet HTML 13Page - Texas Instruments TRF1221 Datasheet HTML 14Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 26 page
background image
www.ti.com
RC1x21 Output Power vs Input Voltage
−6.00
−4.00
−2.00
0.00
2.00
4.00
6.00
8.00
10.00
12.00
14.00
100
1000
10000
Differential Input Voltage (mVppd)
Input at 26 MHz
Output at 325 MHz
T=25 degrees
Input Impedance <800 ohms
Input is sinusoidal
Measured at max gain
INTEGRATED SYNTHESIZERS
PLL Programming
TRF1121
TRF1221
SLWS170A – APRIL 2005 – REVISED DECEMBER 2005
Figure 4 shows the output power, two-tone imtermodulation level, LO leakage and gain deviation from ideal vs
gain state while Figure 5 shows the upconverter gain variation vs temperature.
NOTE: If left unconnected, the GAIN[0], GAIN[1], GAIN[2], GAIN[3], GAIN[4], and TXEN pins rest on logic Low.
Figure 6. Output Power vs Input Voltage
Synthesizer #1 (UHF) and synthesizer #2 (S-band) are both integrated in the TRF1121/TRF1221. These two
PLLs can be programmed via a 3-wire serial bus (CLK, DATA, and EN) from the baseband processor. The timing
specs are given in the AC Timing table.
Synthesizer #2 has a step size of 1 MHz, while Synthesizer #1 offers a step size of 50 kHz, both assuming an
18-MHz reference frequency. Different reference frequencies yield different step sizes, many of which may be
non-integer.
NOTE:
If left unconnected, the DATA, CLK and EN pins rest on logic High. EN is level
sensitive.
10



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com