LTC4292 datasheet(7/40 Pages) AD

7 / 40 page

LTC4291-1/LTC4292

Rev 0

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SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

ARA to INT Pin High Time

(Note 9)

1.5

µs

SCL Fall to ACK Low

(Note 9)

130

ELECTRICAL CHARACTERISTICS The

denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. AGNDP – VEE = 54V and VDD – DGND = 3.3V unless otherwise noted.

(Notes 3 and 4)

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. With the exception of (VDD –

DGND), exposure to any Absolute Maximum Rating condition for extended

periods may affect device reliability and lifetime.

Note 2: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 140ºC when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability.

Note 3: All currents into device pins are positive; all currents out of device

pins are negative.

Note 4: The LTC4292 operates with a negative supply voltage (with

respect to AGNDP). To avoid confusion, voltages in this data sheet are

referred to in terms of absolute magnitude.

Note 5: tDIS is the same as tMPDO defined by IEEE 802.3.

Note 6: The LTC4291-1 digital interface operates with respect to DGND. All

logic levels are measured with respect to DGND.

Note 7: Guaranteed by design, not subject to test.

Note 8: The IEEE 802.3 specification allows a PD to present its

Maintain Power Signature (MPS) on an intermittent basis without being

disconnected. In order to stay powered, the PD must present the MPS for

tMPS within any tMPDO time window.

Note 9: Values Measured at VILD and VIHD.

Note 10: If a fault condition occurs during an I2C transaction, the INT pin

will not be pulled down until a stop condition is present on the I2C bus.

Note 11: Load characteristics of the LTC4292 during Mark: 7V <

(AGNDP – VOUTnM) < 10V or IOUTnM < 50µA.

Note 12: See the LTC4291 Software Programming documentation for

information on serial bus usage and device configuration and status

registers.

Note 13: Do not source or sink current from CAP1 and CAP2.

Note 14: For single-signature PDs, tPON is measured from end of valid

detect on either power channel. For dual-signature PDs, tPON is measured

from the end of valid detect on the same power channel.

Note 15: Port current and port power measurements depend on sense

resistor value (0.15Ω typical). See External Component Selection for

details.

Note 16: The full-scale range for each power channel is half of the port

full-scale range.

Note 17: See Inrush Control for details on inrush threshold selection.

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