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LTC4292 Datasheet(PDF) 27 Page - Analog Devices

Part # LTC4292
Description  4-Port IEEE 802.3bt PoE PSE Controller
PDF  40 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTC4292 Datasheet(HTML) 27 Page - Analog Devices

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LTC4291-1/LTC4292
27
Rev 0
For more information www.analog.com
APPLICATIONS INFORMATION
assigned Class, the main supply voltage (VEE), the PSE
Type (Type 3 or 4), and the MOSFET SOA.
A single set of programmable port ICUT-2P and ILIM-2P
thresholds is shared by both channels. The thresholds
should be set based on the classification result as shown
in Table 4 and Table 5. For a dual-signature PD assigned
unequal Classes, the highest Class is used to set the
thresholds. For example, a dual-signature PD assigned
Class 1 and Class 5 would enforce ICUT-2P and ILIM-2P
based on Class 5.
Per the IEEE specification, the LTC4291-1/LTC4292 will
allow the channel current to exceed ICUT-2P for a limited
period of time before removing power from the port, or
channel, as appropriate whereas it will actively control
the MOSFET gate drive to keep the channel current below
ILIM-2P. The channel does not take any action to limit the
current when only the ICUT-2P threshold is exceeded, but
does start the tCUT timer. If the current drops below the
ICUT-2P threshold before its timer expires, the tCUT timer
counts back down, but at 1/16 the rate that it counts up. If
the tCUT timer reaches 59ms (typical), the port or channel,
as appropriate, is turned off and the corresponding tCUT
faults are set. This allows the channel to tolerate intermit-
tent overload signals with duty cycles below about 6%;
longer duty cycle overloads will remove power from the
port or channel, as appropriate.
The ILIM-2P current limiting circuit is always enabled and
actively limiting channel current. The tLIM timer is enabled
only when the tLIM Timer Configuration field is set to a
non-zero value. This allows tLIM to be set to a shorter value
than tCUT to provide more aggressive MOSFET protection
and turn off a port before MOSFET damage can occur. The
tLIM timer starts when the ILIM-2P threshold is exceeded.
When the tLIM timer reaches 1.7ms (typical) times the
value in the tLIM Timer Configuration field, the port or
channel, as appropriate, is turned off and the appropriate
tLIM faults are set. When the tLIM Timer Configuration field
is set to 0, tLIM behaviors are tracked by the tCUT timer,
which counts up during both ILIM-2P and ICUT-2P events.
To maintain IEEE compliance, the programmed tLIM Timer
Configuration field should be set as shown in the LTC4291
Software Programming documentation.
ICUT-2P is typically set to a lower value than ILIM-2P,
allowing the port to tolerate minor faults without current
limiting.
To maintain IEEE compliance, the programmed ILIM-2P
should be set as shown in Tables 4 and 5. The pro-
grammed ILIM-2P setting is automatically applied follow-
ing the completion of inrush.
The tCUT and tLIM timers are maintained on a per channel
basis. When a tCUT or tLIM fault occurs a determination is
made to turn off one or both channels. See the Port Fault
vs Channel Fault section for details.
ILIM-2P Foldback
The LTC4291-1/LTC4292 ILIM-2P threshold is imple-
mented as a two-stage foldback circuit that reduces the
channel current if the channel voltage falls below the nor-
mal operating voltage. This keeps MOSFET power dissipa-
tion at safe levels. Current limit and foldback behavior are
programmable on a per-port basis.
The LTC4291-1/LTC4292 supports current levels well
beyond the maximum values in the 802.3bt specifica-
tion. Large values of ILIM-2P may require larger external
MOSFETs, additional heat sinking, and setting the tLIM
Timer Configuration field to a lower value.
MOSFET Fault Detection
LTC4291-1/LTC4292 PSE ports are designed to tolerate
significant levels of abuse, but in extreme cases it is pos-
sible for an external MOSFET to be damaged. A failed
MOSFET may short source to drain, which will make the
port appear to be on when it should be off; this condition
may also cause the sense resistor to fuse open, turning
off the port but causing SENSE to rise to an abnormally
high voltage. A failed MOSFET may also short from gate to
drain, causing GATE to rise to an abnormally high voltage.
OUT, SENSE and GATE are designed to tolerate up to 80V
faults without damage.



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