ML7055LP datasheet(8/30 Pages) OKI

8 / 30 page

FEDL7055-02

OKI Semiconductor

ML7055

8/30

CLK and Configuration

Pin Placement

Pin Name

Direc-

tion

Internal

Pull Up/

Down,

Schmitt

Initial

Value

ML7055

Description

SCLKP

—

SCLKN

—

E10

F10

System clock (12/13 MHz) pins

(Power level: CMOS level)

XC32KP

—

XC32KN

—

Subclock pins (for oscillator)

SCLKSEL

Pull

down

—

System clock frequency select pin

L: Select CLK divided by

internal PLL

H: Select subclock

SFRQSEL

Pull

down

—

System clock frequency select pin

13 MHz

12 MHz

RFSEL0–

—

[*1]

[*2]

[*3]

RF-LSI select pins

RFSEL[2:0]

001:

ML7050 (OKI)

010:

CX72303 (SKYWORKS)

101:

BCM2002X

(BROADCOM)

Others: Unused

RESET

Schmitt

—

F10

G10

Hardware reset pin (Reset = L)

DETACH

Schmitt

—

Sleep pin (Sleep = L)

SCL

—

2C serial clock

SDA

I/O

—

2C serial data

CLKOUT

—

System clock (12/13 MHz) output

pins

[*1]

RFSEL0: E3; RFSEL1: E4; RFSEL2: H1

[*2]

RFSEL0: H9; RFSEL1: H10; RFSEL2: K10

[*3]

RFSEL0: H10; RFSEL1: H8; RFSEL2: K10

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