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PC8374L Datasheet(PDF) 26 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 26 Page - National Semiconductor (TI) |
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26 / 239 page ![]() 1.0 Signal/Pin Connection and Description (Continued) www.national.com 26 Revision1.1 1.4.10 Clock 1.4.11 Glue Functions Signal Pin(s) I/O Buffer Type Power Well Description CLOCKI14 65 I INTS VDD3 High-Frequency Clock Input. 14.31818 MHz clock for the on- chip, 48 MHz Clock Generator (for the Legacy modules). Signal Pin(s) I/O Buffer Type Power Well Description REF5V 70 O AO VSB3 Main Highest Active Supply, Reference Output. Reference voltage equal to the highest voltage between VDD5 and VDD3. External pull-up resistor to VDD5 is required. REF5V_STBY 72 O AO VSB3 Standby Highest Active Supply, Reference Output. Reference voltage equal to the highest voltage between VSB5 and VSB3. External pull-up resistor to VSB5 is required. PS_ON 81 O OD6 VSB3 Main Power Supply On/Off Control. Active (low) level turns the main power supply (VDD) on. External pull-up resistor to VSB5 is required. PWRGD_PS 82 I INTS4 VSB3 Power Good Signal from the Power Supply. Active level indicates the Main power supply voltage is valid. PWRGD_3V 84 O O3/6 VSB3 Power Good Output. Active level indicates: Main supply voltage is valid and the system is in a higher than S3 sleep state. CPU_PRESENT 83 I INTS4 VSB3 CPU Present. Active (low) level indicates a processor is currently plugged in. BKFD_CUT 77 O OD6 VSB3 Backfeed-Cut Control. Power distribution control (when switching between main and standby regulators) for system transition into and out of the S3 sleep state. External pull-up resistor to VSB5 is required. LATCHED_BF_ CUT 79 O O14/14 VSB3 Latched Backfeed-Cut. Power distribution control (when switching between main and standby regulators) for system transition into and out of the S5 sleep state. VSB5 71 I AI VSB3 Standby 5V Power Supply. Used for Resume Reset generation (Range: 0-5.5V, Backdrive protected). RSMRST 92 O O3/6 VSB3 Resume Reset. Power-Up reset signal based on the VSB5 supply voltage. PRIMARY_HD 67 I INTS4 VDD3 Primary Drive. Active (low) level indicates that the primary IDE drive is active. SECONDARY_HD 68 I INTS4 VDD3 Secondary Drive. Active (low) level indicates that the secondary IDE drive is active. SCSI 69 I INTS4 VDD3 SCSI Drive. Active (low) level indicates that the SCSI drive is active. HD_LED 66 O OD12 VDD3 Hard Drive LED. Red LED driver. When low, indicates that at least one drive is active. CC_DDCSCL 113 I/O SWSM VSB3 Chipset Cluster (2.5V or 3.3V) Level DDC Serial Clock. SMBus serial clock signal with 2.5V or 3.3V logic levels for Data Display Channel (DDC) interface. External pull-up resistor to VDD3 or 2.5V is required. 5V_DDCSCL 114 I/O SWSM VSB3 5V Level DDC Serial Clock. SMBus serial clock signal with 5V logic levels for VGA monitor interface. External pull-up resistor to VDD5 is required. Winbond Electronics Corp. Advanced PC Product Center |
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