PC8374L datasheet(68/239 Pages) NSC

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3.0 Device Architecture and Configuration (Continued)

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3.11 SERIAL PORT 1 CONFIGURATION

3.11.1 General Description

Serial Port 1 provides UART functionality by supporting serial data communication with a remote peripheral device or a mo-

dem. The functional blocks can function as a standard 16450 or 16550 or as an Extended UART.

Serial Port 1 includes four register banks, each containing eight runtime registers, as shown in Section 9.3 on page 196. All

registers are VDD3 powered.

3.11.2 Logical Device 3 (SP1) Configuration

Table 25 lists the configuration registers that affect Serial Port 1. Only the last register (F0h) is described here. See

Section 3.2.3 on page 39 for descriptions of the other configuration registers. All of these registers are VDD3 powered.

Table 25. Serial Port 1 Conﬁguration Registers

Index

Conﬁguration Register or Action

Type

Power Well

Reset

30h Activate (see Section 3.3.1 on page 48).

R/W

VDD3

00h

60h Base Address MSB register. Bits 7-3 (for A15-11) are read-only, ‘00000’.

R/W

VDD3

03h

61h Base Address LSB register. Bits 2-0 (for A2-0) are read-only, ‘000’.

R/W

VDD3

F8h

70h Interrupt Number and Wake-Up on IRQ Enable register.

R/W

VDD3

04h

71h Interrupt Type. Bit 1 is R/W; other bits are read-only.

R/W

VDD3

03h

74h Report no DMA Assignment.

VDD3

04h

75h Report no DMA Assignment.

VDD3

04h

F0h Serial Port 1 Conﬁguration register.

R/W

VDD3

02h

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