AX5043 datasheet(22/47 Pages) ONSEMI

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AX5043

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Table 22. MODULATIONS

Modulation

Bit = 0

Bit = 1

Main Lobe Bandwidth

Max. Bitrate

ASK

PA off

PA on

BW = BITRATE

125 kBit/s

FSK/MSK/GFSK/GMSK

Df = −fdeviation

Df = +fdeviation

BW = (1 + h) ⋅BITRATE

125 kBit/s

PSK

DF = 0°

DF = 180°

BW = BITRATE

125 kBit/s

= modulation index. It is the ratio of the deviation

compared to the bit−rate; fdeviation = 0.5⋅h⋅BITRATE,

AX5043 can demodulate signals with h < 32.

ASK = amplitude shift keying

FSK = frequency shift keying

MSK= minimum shift keying; MSK is a special case of

FSK, where h = 0.5, and therefore

fdeviation = 0.25⋅BITRATE; the advantage of MSK over FSK

is that it can be demodulated more robustly.

PSK = phase shift keying

All modulation schemes, except 4−FSK, are binary.

Amplitude can be shaped using a raised cosine waveform.

Amplitude shaping will also be performed for constant

amplitude modulation ((G)FSK, (G)MSK) for ramping up

and down the PA. Amplitude shaping should always be

enabled.

Frequency shaping can either be hard (FSK, MSK), or

Gaussian (GMSK, GFSK), with selectable BT = 0.3 or

BT = 0.5.

Table 23. 4−FSK MODULATION

Modulation

DiBit = 00

DiBit = 01

DiBit = 11

DiBit = 10

Main Lobe Bandwidth

Max. Bitrate

4−FSK

Df = −3fdeviation

Df = −fdeviation

Df = +fdeviation

Df = +3fdeviation

BW = (1 + 3 h) ⋅BITRATE

125 kBit/s

4−FSK Frequency shaping is always hard.

Automatic Frequency Control (AFC)

The AX5043 features an automatic frequency tracking

loop which is capable of tracking the transmitter frequency

within the RX filter band width. On top of that the AX5043

has a frequency tracking register TRKRFFREQ to

synchronize the receiver frequency to a carrier signal. For

AFC adjustment, the frequency offset can be computed with

the following formula:

Df + TRKRFFREQ

224

fXTAL

The pull−in range of the AFC can be programmed with the

MAXRFOFFSET Registers.

PWRMODE Register

The PWRMODE register controls, which parts of the chip

are operating.

Table 24. PWRMODE REGISTER

PWRMODE Register

Name

Description

0000

POWERDOWN

All digital and analog functions, except the register file, are disabled. The core supply volt-

ages are switched off to conserve leakage power. Register contents are preserved and

accessible registers via SPI, but at a slower speed.

Access to the FIFO is not possible and the contents are not preserved. POWERDOWN

mode is only entered once the FIFO is empty.

0001

DEEPSLEEP

AX5043 is fully turned off. All digital and analog functions are disabled. All register con-

tents are lost.

To leave DEEPSLEEP mode the pin SEL has to be pulled low. This will initiate startup and

reset of the AX5043. Then the MISO line should be polled, as it will be held low during

initialization and will rise to high at the end of the initialization, when the chip becomes

ready for operation.

0101

STANDBY

The crystal oscillator and the reference are powered on; receiver and transmitter are off.

Access to the FIFO is not possible and the contents are not preserved. STANDBY is only

entered once the FIFO is empty.

0110

FIFO

The reference is powered on. Register contents are preserved and accessible registers via

SPI.

Access to the FIFO is possible and the contents are preserved.

1000

SYNTHRX

The synthesizer is running on the receive frequency. Transmitter and receiver are still off.

This mode is used to let the synthesizer settle on the correct frequency for receive.

1001

FULLRX

Synthesizer and receiver are running.

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