AX5043 datasheet(25/47 Pages) ONSEMI

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AX5043

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In synchronous wire mode the, the AX5043 always drives

DCLK. Transmit data must be applied to DATA

synchronously to DCLK, and receive data must be sampled

synchronously to DCLK. Timing is given in Figure 9. In

asynchronous wire mode, a low voltage RS232 type UART

can be connected to DATA. DCLK is optional in this mode.

The UART must be programmed to send two stop bits, but

must be able to accept only one stop bit. Both the UART data

rate and the AX5043 transmit and receive bit rate must

match. The AX5043 synchronizes the RS232 signal to its

internal transmission clock, by inserting or deleting a stop

bit.

Wiremode is also available in 4−FSK mode. The two bits

that encode one symbol are serialized on the DATA pin. The

PWRAMP pin can be used as a synchronisation pin to allow

symbol (dibit) boundaries to be reconstructed. Gray coding

is used to reduce the number of bit errors in case of a wrong

decision. The AXSEM RadioLab software calculates the

necessary register settings for best performance and details

can be found in the AX5043 Programming Manual.

Registers for setting up the AX5043 are programmed via

the serial peripheral interface (SPI).

Wire Mode Timing

Figure 9. Wire Mode Interface Timing

Tdh

DCLK (DCLKI=0)

DATA (RX)

DCLK (DCLKI=1)

Tdco

DATA (TX)

Tdch Tdcl

Tdck

Tds

General Purpose ADC (GPADC)

The AX5043 features a general purpose ADC. The ADC

input pins are GPADC1 and GPADC2. The ADC converts

the voltage difference applied between pins GPADC1 and

GPADC2. If pin GPADC2 is left open, the ADC converts the

difference between an internally generated value of 800 mV

and the voltage applied at pin GPADC1.

The GPADC can only be used if the receiver is disabled.

To enable the GPADC write 1 to the GPADC13 bit in the

GPADCCTRL register. To start a single conversion, write 1

to the BUSY bit in the GPADCCTRL register. Then wait for

the BUSY bit to clear, or the GPADC Interrupt to be asserted.

The GPADC Interrupt is cleared by reading the result

If continuous sampling is desired, set the CONT bit in

specified in the GPADCPERIOD register.

SD DAC

One digital Pin (ANTSEL or PWRAMP) may be used as

SD Digital−to−Analog Converter. A simple RC lowpass

filter is needed to smooth the output. The DAC may be used

to output RSSI, many demodulator variables, or a constant

value under software control.

AX5043 Datasheet(PDF) 25 Page - ON Semiconductor

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