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TPS613761 Datasheet(PDF) 22 Page - Texas Instruments |
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TPS613761 Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 27 page ![]() 9.4.2 Layout Example The bottom layer is a large ground plane connected to the PGND plane and AGND plane on top layer by vias. VIN L1 CVCC CIN COUT CBOOT PGND VOUT D1 PGND FB VOUT_Via COMP ILIM VCC VOUT_Via VOUT VIN RFBT RFBB RILIM CP RCOMP EN ISEL Logic H or L Logic H or L Blue line represents trace on bottom layer Figure 9-11. Layout Example TPS61376 SLVSGQ1A – JANUARY 2022 – REVISED SEPTEMBER 2022 www.ti.com 22 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPS61376 |
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