CS43131 datasheet(123/156 Pages) CIRRUS

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DS1155F1

123

CS43131

7.3 ASP and XSP Registers

2:0

XSP_FSD

XSP frame start delay (units of XSP_SCLK periods).

000 0 delay

001 0.5 delay

010 (Default) 1.0 delay

...

101 2.5 delay

110–111 Reserved

7.3.22 ASP Channel 1 and 2 Location

Address 0x50000, 0x50001

R/W

76543210

ASP_RX_CH1

ASP_RX_CH2

Default

00000000

Bits

Name

Description

7:0 ASP_RX_CHn ASP Rx channel n location. Sets the location in ASP_SCLK periods of the ASP Rx channel n from the start of the TDM

frame.

0x00 Start on SCLK 0

...

0xFF Start on SCLK 255

Defaults are 0x00.

7.3.23 ASP Channel 1 Size and Enable

Address 0x5000A

R/W

76543210

—

ASP_RX_CH1_

ASP_RX_CH1_RES

Default

00000110

7.3.24 ASP Channel 2 Size and Enable

Address 0x5000B

R/W

76543210

—

ASP_RX_CH2_

ASP_RX_CH2_RES

Default

00001110

Bits

Name

Description

7:4

—

Reserved

ASP_RX_

CHn_AP

ASP RX channel n active phase. Valid only in 50/50 mode (ASP_5050 = 1).

0 (Default when n = 1) In 50/50 mode, channel data is input when LRCK/FSYNC is low

1 (Default when n = 2) In 50/50 mode, channel data is input when LRCK/FSYNC is high

ASP_RX_

CHn_EN

ASP RX channel n enable. Configures the state of the data for the ASP on channel n. The same rule applies to CHx_EN.

0 (Default) Input channel data is not propagated to the internal data path

1 Input channel data is propagated to the internal data path

1:0

ASP_RX_

CHn_RES

ASP RX channel n size (in bits). Sets the output resolution of the ASP RX channel n samples.

00 8 bits per sample

01 16 bits per sample

10 (Default) 24 bits per sample

11 32 bits per sample

Bits

Name

Description

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