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CS43131 Datasheet(PDF) 126 Page - Cirrus Logic |
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CS43131 Datasheet(HTML) 126 Page - Cirrus Logic |
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126 / 156 page  126 DS1155F1 CS43131 7.4 DSD Registers 7.4.5 DSD Processor Path Signal Control 2 Address 0x70004 R/W 76543210 — DSD_PRC_SRC DSD_EN DSD_SPEED STA_DSD_DET INV_DSD_DET Default 00000010 Bits Name Description 7— Reserved 6:5 DSD_PRC_ SRC Select the source for DSD processor. 00 (Default) DSD interface 01 Reserved 10 ASP 11 XSP 4 DSD_EN Enable DSD playback. 0 (Default) Function disabled 1 DSD playback is enabled 3:2 DSD_SPEED Setup DSD clock speed. 00 (Default) 64•Fs 01 128•Fs 10 256•Fs 11 Reserved 1STA_DSD_ DET Static DSD detection. 0 Function disabled 1 (Default) Static DSD detection is enabled. The DSD processor checks for 28 consecutive zeros or ones and, if detected, sets the DSD_STUCK_INT interrupt status bit and mutes the output until the static condition is cleared. If DSD_AMUTE is enabled, AMUTE will be in effect in this scenario. 0INV_DSD_ DET Invalid DSD detection. 0 (Default) Function disabled 1 Invalid DSD detection is enabled. The DSD processor checks for 25 out of 28 bits of the same value and, if detected, sets the DSD_INVAL_A_INT and/or DSD_INVAL_B_INT interrupt status bits. 7.4.6 DSD and PCM Mixing Control Address 0x70005 R/W 76543210 — MIX_PCM_ PREP MIX_PCM_ DSD Default 00000000 Bits Name Description 7:2 — Reserved 1MIX_PCM_ PREP Enable PCM playback path for PCM and DSD mixing. This bit must be set prior to setting MIX_PCM_DSD. Disable this bit after disabling MIX_PCM_DSD. This mode requires DSD_EN to be enabled and DSD_PRC_SRC set to receive DSD through either the DSD interface or XSP. 0 (Default) Function disabled 1 Enable PCM playback path for PCM and DSD mixing 0MIX_PCM_ DSD Enable PCM stream mixing into DSD stream. This bit must be set only after MIX_PCM_PREP is enabled. Disable this bit prior to disabling MIX_PCM_PREP bit. This mode requires DSD_EN to be enabled and DSD_PRC_SRC set to receive DSD through either the DSD interface or XSP. 0 (Default) Function disabled 1 Enable PCM stream mixing into the DSD stream 7.4.7 DSD Processor Path Signal Control 3 Address 0x70006 R/W 76543210 DSD_ZERODB DSD_HPF_EN — SIGCTL_ DSDEQPCM DSD_INV_A DSD_INV_B DSD_SWAP_ CHAN DSD_COPY_ CHAN Default 01000000 Bits Name Description 7DSD_ ZERODB Setting on DSD stream volume to match PCM stream volume. 0 (Default) The SACD +3.1-dB level (71% modulation index) matches PCM 0 dB full scale. 1 The SACD 0-dB reference level (50% modulation index) matches PCM 0 dB full scale. |
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