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VS1103 Datasheet(PDF) 32 Page - VLSI Solution Oy |
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VS1103 Datasheet(HTML) 32 Page - VLSI Solution Oy |
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32 / 61 page ![]() VS1103b Datasheet 6 FUNCTIONAL DESCRIPTION 6.6.4 SCI_CLOCKF (RW) SCI_CLOCKF is used to control the internal clock of VS1103b. SCI_CLOCKF bits Name Bits Description SC_MULT 15:13 Clock multiplier SC_ZERO 12:11 Set to zero SC_FREQ 10: 0 Clock frequency SC_MULT activates the built-in clock multiplier. This will multiply XTALI to create a higher CLKI. The values are as follows: SC_MULT MASK CLKI 0 0x0000 XTALI 1 0x2000 XTALI×1.5 2 0x4000 XTALI×2.0 3 0x6000 XTALI×2.5 4 0x8000 XTALI×3.0 5 0xa000 XTALI×3.5 6 0xc000 XTALI×4.0 7 0xe000 XTALI×4.5 SC_FREQ is used to tell if the input clock XTALI is running at something else than 12.288 MHz. XTALI is set in 4 kHz steps. The formula for calculating the correct value for this register is XT ALI−8000000 4000 (XTALI is in Hz). Note: As opposed to some other VS10XX chips, a software reset must be performed after SCI_CLOCKF has been set. It is recommended that SCI_CLOCKF is set only after each hardware reset / startup. Note: The default value 0 is assumed to mean XTALI=12.288 MHz. Note: Because maximum sample rate is XT ALI 256 , all sample rates are not available if XTALI < 12.288 MHz. Example: If SCI_CLOCKF is 0xC3E8, SC_MULT = 6 and SC_FREQ = 0x3E8 = 1000. This means that XTALI = 1000 × 4000 + 8000000 = 12 MHz. The clock multiplier is set to 4.0×XTALI = 48 MHz. 6.6.5 SCI_DECODE_TIME (RW) When decoding correct MIDI data, current decoded time is shown in this register in full seconds. The user may change the value of this register. In that case the new value should be written twice. SCI_DECODE_TIME is reset at every software reset and also when MIDI decoding starts or ends. Version: 1.04, 2018-03-16 32 |
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