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VS1103 Datasheet(PDF) 49 Page - VLSI Solution Oy |
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VS1103 Datasheet(HTML) 49 Page - VLSI Solution Oy |
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49 / 61 page ![]() VS1103b Datasheet 8 VS1103B REGISTERS 8.9 A/D Modulator Registers Interrupt registers, prefix AD_ Reg Type Reset Abbrev[bits] Description 0xC01E rw 0 DIV A/D Modulator divider. 0xC01F rw 0 DATA A/D Modulator data. AD_DIV bits Name Bits Description ADM_POWERDOWN 15 1 in powerdown. ADM_DIVIDER 14:0 Divider. ADM_DIVIDER controls the AD converter’s sampling frequency. To gather one sample, 128 × n clock cycles are used (n is value of AD_DIV). The lowest usable value is 4, which gives a 48 kHz sample rate when CLKI is 24.576 MHz. When ADM_POWERDOWN is 1, the A/D converter is turned off. AD_DATA contains the latest decoded A/D value. Version: 1.04, 2018-03-16 49 |
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