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MPC8540 Datasheet(PDF) 340 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 340 Page - Freescale Semiconductor, Inc |
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340 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 7-36 Freescale Semiconductor L2 Look-Aside Cache/SRAM 7.10.2.2 Tag Parity Errors A tag parity error must be fixed by flash invalidating the L2 cache. Note that executing a dcbf instruction for the address that caused the error to be reported is not sufficient because a tag parity error is seen as an L2 miss and does not cause invalidation of the bad tag. Proper L2 operation cannot be guaranteed if an L2 tag parity error is not repaired by a flash invalidation of the entire array. |
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