MPC8540 datasheet(372/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

9-18

Freescale Semiconductor

DDR Memory Controller

9.4.1.9

Memory Data Path Error Injection Mask Low

(DATA_ERR_INJECT_LO)

The memory data path error injection mask low register is shown in Figure 9-10.

Figure 9-10. Memory Data Path Error Injection Mask Low Register

(DATA_ERR_INJECT_LO)

Table 9-14 describes the DATA_ERR_INJECT_LO fields.

9.4.1.10 Memory Data Path Error Injection Mask ECC

(ECC_ERR_INJECT)

The memory data path error injection mask ECC register, shown in Figure 9-11, sets the ECC

mask, enables errors to be written to ECC memory, and allows the ECC byte to mirror the most

significant data byte.

Figure 9-11. Memory Data Path Error Injection Mask ECC Register (ECC_ERR_INJECT)

EIML

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x0_2E04

Table 9-14. DATA_ERR_INJECT_LO Field Descriptions

Bits

Name

Description

0–31

EIML

Error injection mask low data path. Used to test ECC by forcing errors on the low word of the data path.

Setting a bit causes the corresponding data path bit to be inverted on memory bus writes.

R 0

0000

EMB EIEN

EEIM

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x0_2E08

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