Electronic Components Datasheet Search
  English  ▼

X  

MPC8540 Datasheet(PDF) 373 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 373 Page - Freescale Semiconductor, Inc

Back Button MPC8540 Datasheet HTML 369Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 370Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 371Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 372Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 373Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 374Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 375Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 376Page - Freescale Semiconductor, Inc MPC8540 Datasheet HTML 377Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 373 / 1302 page
background image
Memory Map/Register Definition
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
9-19
Table 9-15 describes the ECC_ERR_INJECT fields.
9.4.1.11 Memory Data Path Read Capture High (CAPTURE_DATA_HI)
The memory data path read capture high register, shown in Figure 9-12, stores the high word of
the read data path during error capture.
Figure 9-12. Memory Data Path Read Capture High Register (CAPTURE_DATA_HI)
Table 9-16 describes the CAPTURE_DATA_HI fields.
Table 9-15. ECC_ERR_INJECT Field Descriptions
Bits
Name
Description
0–21
—
Reserved
22
EMB
ECC mirror byte
0 Mirror byte functionality disabled
1 Mirror the most significant data path byte onto the ECC byte.
23
EIEN
Error injection enable
0 Error injection disabled
1 Error injection enabled. This applies to the data mask bits, the ECC mask bits, and the ECC mirror bit.
24–31
EEIM ECC error injection mask. Setting a mask bit causes the corresponding ECC bit to be inverted on
memory bus writes.
0
31
R
ECHD
W
Reset
0000_0000_0000_0000_0000_0000_0000_0000
Offset
0x0_2E20
Table 9-16. CAPTURE_DATA_HI Field Descriptions
Bits
Name
Description
0–31
ECHD
Error capture high data path. Captures the high word of the data path when errors are detected.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com