MPC8540 datasheet(396/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

9-42

Freescale Semiconductor

DDR Memory Controller

When a refresh cycle is required, the DDR memory controller does the following:

1. Completes all current memory requests

2. Closes all open pages with a PRECHARGE-ALL command to each DDR SDRAM bank

with an open page (as indicated by the row open table)

3. Issues an auto-refresh command to each DDR SDRAM bank (as identified by its chip

select) to refresh one row in each logical bank of the selected physical bank

The auto-refresh commands are staggered across the four possible banks to reduce the system’s

instantaneous power requirements. Three sets of auto refresh commands must be issued on

consecutive cycles when the memory is fully populated with two DIMMs. The initial

PRECHARGE-ALL commands are also staggered in three groups for convenience. It is important

to note that when entering self-refresh mode, only one refresh command is issued simultaneously

to all physical banks. CKE is negated at this time, so it would not be possible to stagger two more

refresh commands. For this entire refresh sequence, no cycle optimization occurs for the usual case

where fewer than four banks are installed. After the refresh sequence completes, any pending

memory request is initiated after an inactive period specified by TIMING_CFG_1 [REFREC].

9.5.8.1

DDR SDRAM Refresh Timing

Refresh timing for the DDR SDRAM is controlled by the programmable timing parameter

TIMING_CFG_1 [REFREC], which specifies the number of memory bus clock cycles from the

refresh command until a logical bank activate command is allowed. The DDR memory controller

implements bank staggering for refreshes, as shown in Figure 9-33 (TIMING_CFG_1

[REFREC] = 10 in this example).

Figure 9-33. DDR SDRAM Bank-Staggered Auto-Refresh Timing

SDRAM Clock

MCS(0,3)

MCAS

MRAS

MCS(1)

MCS(2)

MA[13:0]

ROW

CKE

REFREC

2345

MPC8540 Datasheet(PDF) 396 Page - Freescale Semiconductor, Inc