MPC8540 datasheet(430/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

10-26

Freescale Semiconductor

Programmable Interrupt Controller

10.3.3 IRQ_OUT and Critical Interrupt Summary Registers

The summary registers indicate the interrupt sources directed to IRQ_OUT or cint. Summary

Note that only level-sensitive interrupts can be directed to IRQ_OUT or cint.

10.3.3.1 IRQ_OUT Summary Register 0 (IRQSR0)

The IRQ_OUT summary registers contain one bit for each interrupt source. The corresponding bit

is set if the interrupt is active and is directed to IRQ_OUT (that is, if the corresponding xIDR[EP]

is set). Figure 10-16 shows IRQSR0.

Figure 10-16. IRQ_OUT Summary Register 0 (IRQSR0)

Table 10-21 describes the IRQSR0 fields.

16171819

R 0

0 000 000 00 0000 MSG0 MSG1 MSG2 MSG3

EXTn

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x4_1310

Table 10-21. IRQSR0 Field Descriptions

Bits

Name

Description

0–15

—

Reserved

MSG0 Message interrupt 0 status

0 Interrupt is not active or not directed to IRQ_OUT.

1 Interrupt is active and is directed to the IRQ_OUT pin (that is, if the corresponding xIDR[EP] is set.

MSG1 Message interrupt 1 status

0 Interrupt is not active or not directed to IRQ_OUT.

1 Interrupt is active and is directed to the IRQ_OUT pin (that is, if the corresponding xIDR[EP] is set.

MSG2 Message interrupt 2 status

0 Interrupt is not active or not directed to IRQ_OUT.

1 Interrupt is active and is directed to IRQ_OUT (that is, if the EP corresponding xIDR[EP] is set.

MSG3 Message interrupt 3 status

0 Interrupt is not active or not directed to IRQ_OUT.

1 Interrupt is active and is directed to IRQ_OUT (that is, if corresponding xIDR[EP] is set.

20–31

EXTn External interrupts 0–11. Each bit corresponds to a different interrupt according to the following:

Bit Interrupt

20IRQ0

21IRQ1

· ·

31IRQ11

0 The corresponding interrupt is not active or not directed to IRQ_OUT.

1 The corresponding interrupt is active and directed to IRQ_OUT (if the corresponding xIDR[EP] is set.

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