MPC8540 datasheet(445/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

10-41

10.3.7.3 Who Am I Register (WHOAMI)

The processor who am I register (WHOAMI), shown in Figure 10-34, can be read by the processor

to determine its physical connection to the PIC. The value returned when reading this register may

be used to determine the value for the destination masks used for dispatching interrupts.

Figure 10-34. Processor Who Am I Register (WHOAMI)

Table 10-39 describes the WHOAMI fields.

10.3.7.4 Processor Interrupt Acknowledge Register (IACK)

In systems based on processors that implement the PowerPC architecture, the interrupt

acknowledge function occurs as an explicit read operation to a memory-mapped interrupt

acknowledge register (IACK), shown in Figure 10-35. Reading the interrupt acknowledge register

returns the interrupt vector corresponding to the highest priority pending interrupt. Reading IACK

also has the following side effects:

•

The associated field in the interrupt pending register (IPR) is cleared for edge-sensitive

interrupts to indicated that the interrupt is no longer pending.

•

The corresponding field in the in-service register (ISR) is set to indicated that the interrupt

has been signaled to the core.

•

The interrupt signal (int) to the processor is negated.

Reading this register when there is no pending interrupt returns the spurious vector value as

described in Section 10.3.1.6, “Spurious Vector Register (SVR).”

R 0

0000 00000

000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0x6_0090 (see Section 10.3.7, “Per-CPU Registers.”)

Table 10-39. WHOAMI Field Descriptions

Bits

Name

Description

0–26

—

Reserved

27–3

ID. Returns the ID of the processor reading this register. Always returns zero.

00000Processor core

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