MPC8540 datasheet(453/1302 Pages) FREESCALE

453 / 1302 page

Initialization/Application Information

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

10-49

In addition, the following initialization sequence is recommended:

1. Write the vector, priority, and polarity values in each interrupt’s vector/priority register,

leaving their MSK (mask) bit set. This is required only if interrupts are used.

2. Clear the CTPR (CTPR = 0x0000_0000).

3. Program the PIC to mixed mode by setting GCR[M].

4. Clear the MSK bit in the vector/priority registers to be used.

5. Perform a software loop to clear all pending interrupts:

— Load counter with FPR[NIRQ].

— While counter > 0, perform IACK and EOIs to guarantee all the interrupt pending and

in-service registers are cleared.

6. Set the processor CTPR value to the desired value.

Depending on the interrupt system configuration, the PIC may generate spurious interrupts to clear

interrupts latched during power-up. A spurious or non-spurious vector is returned for an interrupt

acknowledge cycle in this case. See the programming note below for the non-spurious case.

NOTE:

Because the default polarity/sense for external interrupts is

edge-sensitive, and edge-sensitive interrupts are not cleared until they

are acknowledged, it is possible for the PIC to store spurious edges

detected during power-up as pending external interrupts. If software

permanently configures an external interrupt source to be

edge-sensitive, it may receive the vector for the interrupt source and

not a spurious interrupt vector when software clears the mask bit. This

can occur once for any edge-sensitive interrupt when its mask bit is

first cleared and the PIC is in mixed mode.

To avoid having to handle a false interrupt for this case, software can

clear the PIC interrupt pending register of these spurious edge

detections by first configuring the polarity/sense of external interrupt

sources to be level-sensitive; high-level if the input is a positive-edge

source, low-level if it’s a negative-edge source (while the mask bit

remains set). After this is complete, configuring the external interrupt

source as edge-sensitive will not cause a false interrupt.

MPC8540 Datasheet(PDF) 453 Page - Freescale Semiconductor, Inc