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MPC8540 Datasheet(PDF) 455 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 455 Page - Freescale Semiconductor, Inc |
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455 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 11-1 Chapter 11 I2C Interface This chapter describes the inter-IC (IIC or I2C) bus interface implemented on this device. 11.1 Introduction The I 2C bus is a two-wire—serial data (SDA) and serial clock (SCL)— bidirectional serial bus that provides a simple efficient method of data exchange between this device and other devices, such as microcontrollers, EEPROMs, real-time clock devices, A/D converters, and LCDs. Figure 11-1 shows a block diagram of the I 2C interface. Figure 11-1. I2C Block Diagram I2CADR I2CFDR I2CCR I2CSR I2CDR Addr Decode Data Mux Address Compare Input Sync In/Out Data Shift Register Clock Control SDA Address and Control Interrupt Data arb_lost and Digital Filter START/ STOP/ Restart and Arbitration Control Divide & I2CDSRR SCL |
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