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MPC8540 Datasheet(PDF) 460 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 460 Page - Freescale Semiconductor, Inc

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
11-6
Freescale Semiconductor
I2C Interface
Table 11-5 describes the bit settings of I2CFDR. It also maps the I2CFDR[FDR] field to the clock
divider values.
11.3.1.3
I2C Control Register (I2CCR)
Figure 11-4 shows the I2C control register.
Figure 11-4. I2C Control Register (I2CCR)
Table 11-5. I2CFDR Field Descriptions
Bits Name
Description
0–1
—
Reserved
2–7
FDR
Frequency divider ratio. Used to prescale the clock for bit rate selection. The serial bit clock
frequency of SCL is equal to the CCB clock divided by the divider. Note that the frequency divider
value can be changed at any point in a program. The serial bit clock frequency divider selections
are described as follows:
FDR Divider (Decimal)
0x00 288
0x01 320
0x02 384
0x03 480
0x04 576
0x05 640
0x06 768
0x07 960
0x08 1152
0x09 1280
0x0A 1536
0x0B 1920
0x0C 2304
0x0D 2560
0x0E 3072
0x0F 3840
0x10 4608
0x11 5120
0x12 6144
0x13 7680
0x14 9216
0x15 10240
FDR Divider (Decimal)
0x16 12288
0x17 15360
0x18 18432
0x19 20480
0x1A 24576
0x1B 30720
0x1C 36864
0x1D 40960
0x1E 49152
0x1F 61440
0x20 160
0x21 192
0x22 224
0x23 256
0x24 320
0x25 384
0x26 448
0x27 512
0x28 640
0x29 768
0x2A 896
FDR Divider (Decimal)
0x2B 1024
0x2C 1280
0x2D 1536
0x2E 1792
0x2F 2048
0x30 2560
0x31 3072
0x32 3584
0x33 4096
0x34 5120
0x35 6144
0x36 7168
0x37 8192
0x38 10240
0x39 12288
0x3A 14336
0x3B 16384
0x3C 20480
0x3D 24576
0x3E 28672
0x3F 32768
0123456
7
R
MEN
MIEN
MSTA
MTX
TXAK
BCST
WRSTA
Reset
0000_0000
Offset
0x0_3008



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