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MPC8540 Datasheet(PDF) 593 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 593 Page - Freescale Semiconductor, Inc |
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593 / 1302 page  Initialization/Application Information MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 13-89 Figure 13-73. Interface to Different Port-Size Devices Table 13-33 lists the bytes required on the data bus for read cycles. Table 13-33. Data Bus Requirements For Read Cycle Transfer Size Address State 1 A[29:31] Port Size/Data Bus Assignments 32-Bit 16-Bit 8-Bit 0–7 8–15 16–23 24–31 0–7 8–15 0–7 Byte 000 OP02 —3 — — OP0 — OP0 001 — OP1 — — — OP1 OP1 010 — —OP2 —OP2 —OP2 011 — — — OP3 — OP3 OP3 100 OP4 — — — OP4 — OP4 101 — OP5 — — — OP5 OP5 110 — —OP6 —OP6 —OP6 111 — — — OP7 — OP7 OP7 0 31 63 OP0 OP1 OP2 OP3 OP4 OP5 OP6 OP7 D[0:7] D[8:15] D[15:23] D[24:31] OP0 OP1 OP2 OP3 OP4 OP5 OP6 OP7 OP0 OP1 OP2 OP3 OP4 OP5 OP6 OP7 OP0 OP7 32-Bit Port Size Interface Output Register 16-Bit Port Size 8-Bit Port Size |
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