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MPC8540 Datasheet(PDF) 597 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 597 Page - Freescale Semiconductor, Inc |
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597 / 1302 page ![]() Initialization/Application Information MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 13-93 Figure 13-74. 128-Mbyte SDRAM Diagram Table 13-35 shows details about LADn signal connections for the example in Figure 13-74. Table 13-35. LADn Signal Connections to 128-Mbyte SDRAM LAD (latch address) SDRAM Address Pin LAD29 A0 LAD28 A1 LAD27 A2 LAD26 A3 LAD25 A4 LAD24 A5 LAD23 A6 LAD22 A7 LAD21 A8 LAD20 A9 LAD19 (no connect) A10 is connected to LSDA10 DATA[0:7] DATA[24:31] LCSn LSDWE LAD[0:31] LSDRAS LALE LCLK LCKE LSDCAS Latch DQM0 DQM3 LSDDQM[0:3] Local Bus Interface CAS 32M x 8 CS RAS WE BA[1:0] DQM CKE CLK ADDR[12:0] SDRAM DQ[0:7] CAS 32M x 8 CS RAS WE BA[1:0] DQM CKE CLK ADDR[12:0] SDRAM DQ[0:7] x4 • • • LSDA10 A10 A10 • • • |
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