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MPC8540 Datasheet(PDF) 653 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 653 Page - Freescale Semiconductor, Inc

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Memory Map/Register Definition
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
14-27
Table 14-8 describes the fields of the MINFLR register.
14.5.3.1.6 Pause Time Value Register (PTV)
PTV, shown in Figure 14-11, is written by the user to store the pause duration used when the TSEC
initiates a pause frame via TCTRL[TFC_PAUSE]. The low-order 16 bits (PT) represent the pause
time and the high-order 16 bits (PTE) represent the extended pause control parameter. The pause
time is measured in units of pause_quanta, equal to 512 bit times. The pause time can range from
0 to 65,535 pause_quanta, or 0 to 33,553,920 bit times. See Section 14.6.2.7, “Flow Control for
additional details.
Table 14-9 describes the fields of the PTV register.
Table 14-8. MINFLR Field Descriptions
Bits
Name
Description
0–24
—
Reserved
25–31
MINFLR Minimum receive frame length (typically 64 decimal). If the Ethernet receives an incoming frame
shorter than MINFLR, it discards that frame unless RCTRL[RSF] (receive short frames) is set, in
which case RxBD[SH] (frame too short) is set in the last RxBD. The largest allowable value for
MINFLR is 64. Unlike the MPC8260, in which PADs are added to make the transmit frame equal to
MINFLR bytes, if padding is requested, TSEC always PADS transmit frames to 64 bytes ignoring
MINFLR. MINFLR is only used to determine the minimum size of acceptable receive frames.
015 16
31
R
PTE
PT
W
Reset
0000_0000_0000_0000_0000_0000_0000_0000
Offset
TSEC1:0x2_4028; TSEC2:0x2_5028
Figure 14-11. PTV Register Definition
Table 14-9. PTV Field Descriptions
Bits
Name
Description
0–15
PTE
Extended pause control. This field allows software to add a 16-bit additional control
parameter into the pause frame to be sent when TCTRL[TFC_PAUSE] is set. Note
that current IEEE 802.3 pause frame format requires this parameter to be set to 0.
16–31
PT
Pause time value. Represents the 16-bit pause quanta (that is, 512 bit times). This
pause value is used as part of the pause frame to be sent when TCTRL[TFC_PAUSE]
is set. See Section 14.6.2.7, “Flow Control,” for more information.



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