MPC8540 datasheet(658/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

14-32

Freescale Semiconductor

Three-Speed Ethernet Controllers

Table 14-13 describes the fields of the FIFO_TX_THR register.

14.5.3.2.3 FIFO Transmit Starve Register (FIFO_TX_STARVE)

The purpose of the starve register, shown in Figure 14-16, is to inform the system of extremely

imminent underrun conditions. It represents the numerical SRAM entry (0-511 for 2-Kbyte FIFO)

to trigger the starve function. If the number of valid entries in the FIFO is less than or equal to the

starve register, a starve alert is triggered.

Table 14-14 describes the fields of the FIFO_TX_STARVE register.

14.5.3.2.4 FIFO Transmit Starve Shutoff Register

(FIFO_TX_STARVE_SHUTOFF)

The starve shutoff register, shown in Figure 14-17, contains the watermark level to be used for

exiting the starve state. If the starve state is in effect and the number of valid entries in the FIFO

becomes greater than or equal to the value in the FIFO transmit starve shutoff register, the starve

condition ends. This register is read/write by software.

Table 14-13. FIFO_TX_THR Field Descriptions

Bits

Name

Description

0–22

—

Reserved

23–31

FIFO_TX_THR

FIFO transmit threshold. These bits mark the number of entries in the transmit FIFO that, if

reached, trigger the unloading of frame data into the MAC.

22 23

R 000

0000000

000000

0000000

FIFO_TX_STARVE

Reset

0000_0000_0000_0000_0000_0000_1000_0000

Offset

TSEC1:0x2_4098; TSEC2:0x2_5098

Figure 14-16. FIFO_TX_STARVE Register Definition

Table 14-14. FIFO_TX_STARVE Field Descriptions

Bits

Name

Description

0–22

—

Reserved

23–31 FIFO_TX_STARVE FIFO transmit starve. These bits indicate the value to trigger the transmit starve

function. It triggers once the number of valid entries in the FIFO is less than or equal to

the FIFO Tx starve. The starve state turns off if the number of valid entries in the FIFO

becomes greater than or equal to the FIFO Tx starve shutoff register.

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