MPC8540 datasheet(671/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

14-45

Table 14-30 describes the fields of the MRBL register.

14.5.3.4.7 Receive Buffer Descriptor Pointer Register (RBPTR)

RBPTR contains the receive buffer descriptor address. Figure 14-33 shows the RBPTR register.

This register takes on the value of RBASE when the RBASE register is written by software.

Although not necessary in most applications, the user can modify this register when the transmitter

has been gracefully stopped or halted, as indicated by TSTAT[THLT].

Table 14-31 describes the fields of the RBPTR register.

14.5.3.4.8 Receive Descriptor Base Address Register (RBASE)

The RBASE register is written by the user with the RxBD base address and must be divisible by

eight for the 8-byte buffer descriptors. Figure 14-34 shows the RBASE register.

Table 14-30. MRBLR Field Descriptions

Bits

Name

Description

0–15

—

To ensure that MRBL is a multiple of 64, these bits are reserved and must be cleared.

16–25

MRBL

Maximum receive buffer length. MRBL is the number of bytes that the TSEC receiver writes to the

receive buffer. The MRBL register is written by the user with a multiple of 64 for all modes. TSEC can

write fewer bytes to the buffer than the value set in MRBL if a condition such as an error or end-of-frame

occurs, but it never exceeds the MRBL value; therefore, user-supplied buffers must be at least as large

as the MRBL.

26–31

—

To ensure that MRBL is a multiple of 64, these bits are reserved and must be cleared.

28 29

RBPTR

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_4384; TSEC2:0x2_5384

Figure 14-33.

RBPTR Register Definition

Table 14-31. RBPTR Field Descriptions

Bits

Name

Description

0–28

RBPTR The RBPTR register is internally written by the DMA module. The value of this field increments by one

(causing the register value to increment by eight) each time a descriptor is read from memory.

29–31

—

Reserved

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