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MPC8540 Datasheet(PDF) 679 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 679 Page - Freescale Semiconductor, Inc

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Memory Map/Register Definition
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
14-53
14.5.3.6.4 Half-Duplex Register (HAFDUP)
The HAFDUP register is written by the user. Figure 14-38 shows the HAFDUP register.
Table 14-36 describes the fields of the HAFDUP register.
0
7
8
11
12
131415
R
0
0
0
0
0
000
Alternate BEB
Truncation
Alt
BEB
BP No
BackOff
No
BackOff
Excess
Defer
W
Reset
0000_0000_1010_0001
16
19
20
25
26
31
R
Retransmission Maximum
0
000
0
0
Collision Window
W
Reset
1111_0000_0011_0111
Offset
TSEC1:0x2_450C; TSEC2:0x2_550C
Figure 14-38. Half-Duplex Register Definition
Table 14-36. HAFDUP Field Descriptions
Bits
Name
Description
0–7
—
Reserved
8–11
Alternate BEB
Truncation
This field is used while alternate binary exponential back-off enable is set. The value
programmed is substituted for the Ethernet standard value of ten. Its default is 0xA.
12
Alt BEB
Alternate binary exponential back-off. This bit is cleared by default.
0 The Tx MAC follows the standard binary exponential back-off rule.
1 The Tx MAC uses the alternate binary exponential back-off truncation setting instead of the
802.3 standard tenth collision. The standard specifies that any collision after the tenth uses
one less than 210 (210 – 1) as the maximum back-off time.
13
BP No BackOff
Back pressure no back-off. This bit is cleared by default.
0 The Tx MAC follows the binary exponential back-off rule.
1 The Tx MAC immediately re-transmits, following a collision, during back pressure
operation.
14
No BackOff
No back-off. This bit is cleared by default.
0 The Tx MAC follows the binary exponential back-off rule.
1 The Tx MAC immediately re-transmits following a collision.
15
Excess Defer
Excessively deferred. This bit is set by default.
0 The Tx MAC aborts the transmission of a packet that is excessively deferred.
1 The Tx MAC allows the transmission of a packet that is excessively deferred.
16–19
Retransmission
Maximum
This is a programmable field specifying the number of retransmission attempts following a
collision before aborting the packet due to excessive collisions. The standard specifies the
attempt limit to be 0xF (15d). Its default value is 0xF.



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