MPC8540 datasheet(684/1302 Pages) FREESCALE

684 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

14-58

Freescale Semiconductor

Three-Speed Ethernet Controllers

14.5.3.6.11 MII Management Indicator Register (MIIMIND)

The MIIMIND register is read-only by the user. Figure 14-45 shows the MIIMIND register.

Table 14-43 describes the fields of the MIIMIND register.

14.5.3.6.12Interface Status Register (IFSTAT)

Figure 14-46 shows the IFSTAT register.

R 0

000000000000000 000000000000 0 Not Valid Scan Busy

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_4534; TSEC2:0x2_5534

Figure 14-45. MII Management Indicator Register Definition

Table 14-43. MIIMIND Field Descriptions

Bits

Name

Description

0–28

—

Reserved

Not Valid

Not valid

0 MII Mgmt read cycle has completed and the read data is valid.

1 MII Mgmt read cycle has not completed and the read data is not yet valid.

Scan

Scan in progress

0 A scan operation (continuous MII Mgmt read cycles) is not in progress.

1 A scan operation (continuous MII Mgmt read cycles) is in progress.

Busy

0 MII Mgmt block is not currently performing an MII Mgmt read or write cycle.

1 MII Mgmt block is currently performing an MII Mgmt read or write cycle.

000000 000000000000000

Excess

Defer

000

Link

Fail

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_453C; TSEC2:0x2_553C

Figure 14-46. Interface Status Register Definition

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