MPC8540 datasheet(686/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

14-60

Freescale Semiconductor

Three-Speed Ethernet Controllers

Table 14-45 describes the fields of the MACSTNADDR1 register.

14.5.3.6.14Station Address Register Part 2 (MACSTNADDR2)

The MACSTNADDR2 register is written by the user. Figure 14-48 shows the MACSTNADDR2

stored in MACSTNADDR2, where the I/G bit is bit 15, and the U/L bit is bit 14.

Table 14-46 describes the fields of the MACSTNADDR2 register.

14.5.3.7 MIB Registers

This section describes the MIB registers.

The TSEC MSTAT module has 37 separate statistics counters, which simply count or accumulate

statistical events that occur as packets are transmitted and received. These counters support

Table 14-45. MACSTNADDR1 Field Descriptions

Bits

Name

Description

0–7

Station Address, 6th Octet This field holds the sixth octet of the station address. The sixth octet (station

address bits 40–47) defaults to a value of 0x00.

8–15

Station Address, 5th Octet This field holds the fifth octet of the station address. The fifth octet (station address

bits 32–39) defaults to a value of 0x00.

16–23 Station Address, 4th Octet This field holds the fourth octet of the station address. The fourth octet (station

address bits 24–31) defaults to a value of 0x00.

24–31 Station Address, 3rd Octet This field holds the third octet of the station address. The third octet (station

address bits 16–23) defaults to a value of 0x00.

15 16

Station Address, 2nd

Octet

Station Address, 1st Octet

000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

TSEC1:0x2_4544; TSEC2:0x2_5544

Figure 14-48. Station Address Part 2 Register Definition

Table 14-46. MACSTNADDR2 Field Descriptions

Bits

Name

Description

0–7

Station Address, 2nd

Octet

This field holds the second octet of the station address. The second octet (station

address bits 8–15) defaults to a value of 0x00.

8–15

Station Address, 1st Octet This field holds the first octet of the station address. The first octet (station address

bits 0–7) defaults to a value of 0x00.

16–31

—

Reserved

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