MPC8540 datasheet(721/1302 Pages) FREESCALE

721 / 1302 page

Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

14-95

2–3

Remote

Fault

The local device’s remote fault condition is encoded in bits 2 and 3 of the base page. Values are

shown in the following table. The default value is 00. Indicate a fault by setting a non-zero remote

fault encoding and re-negotiating.

4–6

—

Reserved, must be cleared.

7–8

Pause

The local device’s PAUSE capability is encoded in bits 7 and 8, and the decodes are shown in the

following table. For priority resolution information consult Table 14-102.

9Half

Duplex

Half-duplex capability

0 Designates local device as not capable of half-duplex operation.

1 Designates local device as capable of half-duplex operation.

Full

Duplex

Full-duplex capability

0 Designates the local device as not capable of full-duplex operation.

1 Designates the local device as capable of full-duplex operation.

11–15

—

Reserved, must be cleared.

Table 14-101. ANA Field Descriptions (continued)

Bits

Name

Description

RF1 bit[3]

RF2 bit[2]

Description

No error, link OK

Offline

Link_Failure

Auto-Negotiation_Error

PAUSE bit[8]

ASM_DIR bit[7]

Capability

No PAUSE

Asymmetric PAUSE toward link partner

Symmetric PAUSE

Both symmetric PAUSE and

Asymmetric PAUSE toward local device

MPC8540 Datasheet(PDF) 721 Page - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 721 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL