MPC8540 datasheet(742/1302 Pages) FREESCALE

742 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

14-116

Freescale Semiconductor

Three-Speed Ethernet Controllers

Receive frames are not truncated if they exceed maximum frame bytes in the MAC’s maximum

frame register if MACCFG2[Huge Frame] is set, yet the babbling receiver error interrupt occurs

(IEVENT[BABR] is set) and RxBD[LG] is set.

After the receive frame is complete, the Ethernet controller sets RxBD[L], updates the frame status

bits in the RxBD, and clears RxBD[E]. If RxBD[I] is set, the Ethernet controller next generates an

interrupt (that can be masked) indicating that a frame was received and is in memory. The Ethernet

controller then waits for a new frame.

To interrupt reception or rearrange the receive queue, DMACTRL[GRS] must be set. If this bit is

set, the TSEC receiver performs a graceful receive stop. The Ethernet controller stops immediately

if no frames are being received or continues receiving until the current frame either finishes or an

error condition occurs. The IEVENT[GRSC] interrupt event is signalled after the graceful receive

stop operation is completed. While in this mode the user can then clear IEVENT[GRSC] and can

write to registers that are accessible to both the user and the TSEC hardware without fear of

conflict. After DMACTRL[GRS] is cleared, the TSEC scans the input data stream for the start of

a new frame (preamble sequence and start of frame delimiter), it resumes receiving, and the first

valid frame received is placed in the next available RxBD.

14.6.2.5 RMON Support

TSEC automatically gathers network statistics required for RMON without needing to receive all

addresses. The RMON MIB group 1, RMON MIB group 2, RMON MIB group 3, RMON MIB

group 9, RMON MIB 2, and the 802.3 Ethernet MIB are supported.

For RMON statistics and their corresponding counters see the memory map.

14.6.2.6 Frame Recognition

The Ethernet controller performs frame recognition using destination address (DA) recognition. A

frame can be rejected or accepted based on the outcome.

14.6.2.6.1 Destination Address Recognition

The Ethernet controller can also perform the frame filtering using the traditional destination

address (DA) recognition methods.

Figure 14-115 is a flowchart for address recognition on received frames that is used to explain the

concept. In the actual implementation most of the decision points shown in the figure actually

occur simultaneously.

MPC8540 Datasheet(PDF) 742 Page - Freescale Semiconductor, Inc