MPC8540 datasheet(815/1302 Pages) FREESCALE

815 / 1302 page

Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

15-37

Figure 15-23. Stride Size and Stride Distance

15.4.2 DMA Transfer Interfaces

The DMA can be used to achieve data transfers across the entire memory map.

15.4.3 DMA Errors

On a transfer error (uncorrectable ECC errors on memory accesses, parity errors on local bus or

PCI, address mapping errors, for example), the DMA halts by setting SRn[TE] and generates an

interrupt if MRn[EIE] is set. On a programming error, the DMA sets SRn[PE] and generates an

interrupt if MRn[EIE] is set. The DMA controller detects the following programming errors:

•

Transfer started with a byte count of zero.

•

Stride transfer started with a stride size of zero.

•

Transfer started with a priority of three.

•

Illegal type—Defined by SATRn[SREADTTYPE] and DATRn[DWRITETTYPE]. Used

for the transfer.

•

Invalid interface—Defined by SATRn[STRANSINT] and DATRn[DTRANSINT]. Used

for the transfer when in ATMU bypass mode.

15.4.4 DMA Descriptors

The DMA engine recognizes list descriptors and link descriptors. List descriptors connect lists of

link descriptors. Link descriptors describe the DMA activity that is to take place. DMA descriptors

are built in either local or remote memory and are connected by the next descriptor fields. Only

link descriptors contain information for the DMA controller to transfer data. Software must ensure

that each descriptor is 32-byte aligned. The last link descriptor in the last list in memory sets the

EOLND bit in the next link descriptor; the next list descriptor fields indicating that these are the

last descriptors in memory. Software initializes the current list descriptor address register to point

to the first list descriptor in memory. The DMA controller traverses through the descriptor lists

until the last link descriptor is met. For each link descriptor in the chain, the DMA controller starts

a new DMA transfer with the control parameters specified by that descriptor. Link and list

descriptor fetches always snoop the local memory space.

Stride Size

Stride Distance

Base Address

New Base Address

MPC8540 Datasheet(PDF) 815 Page - Freescale Semiconductor, Inc