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MPC8540 Datasheet(PDF) 820 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 820 Page - Freescale Semiconductor, Inc |
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820 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 15-42 Freescale Semiconductor DMA Controller • Transparency of the bus interfaces to DMA operations • What is useful as opposed to what is possible. For example, it is possible to address any internal register via the internal control bus, which means configuration and control registers can be DMA source or destination targets. However, the typical use of DMA functionality is to reduce host processor loading by moving large amounts of data with minimal CPU involvement. Using a general-purpose DMA controller to load small amounts of configuration data only makes sense in special circumstances (perhaps during system boot, for example). Figure 15-27. DMA Data Paths Table 15-24 lists all of the DMA controllers (both captive and general-purpose) on the device and the most likely DMA targets on and off-chip. The bus controllers themselves cannot initiate DMA Three speed OCeaN Ethernet controller 10/100/1G MAC GMII RGMII TBI RTBI DDR SDRAM bus I/O voltages supported = 2.5V Bus speeds: 100MHz(200)/ 133MHz(266)/150MHz(300)/166MHz(333) Support 64-bit wide+ECC (error injection) DDR SDRAM controller e500 core L2 cache Local bus controller Three speed Ethernet controller 10/100/1G MAC PCI/PCI-X controller RapidIO endpoint Ext DMA pins I2C DMA (4 channel) controller Boot sequencer Register & control PCI/PCI-X bus RapidIO I/O voltages supported = 3.3V Local bus I/O voltages supported = 3.3V Bus speeds: 66MHz/83MHz/ 100MHz/133MHz/166MHz Peripheral sizes 8/16/32-bit e500 Coherency Module ECM Open PIC DUART TBI RTBI Fast Ethernet controller 10/100 MAC Serial In/Out |
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