MPC8540 datasheet(963/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

17-39

Table 17-36 describes the fields of the ROWBARs.

17.3.2.2.3 RapidIO Outbound Window Attributes Registers 0–8 (ROWARn)

The RapidIO outbound window attributes registers (ROWARs) define the window size to translate

and other attributes for the translation. The largest window size allowed is 4 Gbytes. Figure 17-33

and Figure 17-34 show the ROWARs.

Figure 17-33. RapidIO Outbound Window Attributes Register 0

(ROWAR0)

Figure 17-34. RapidIO Outbound Window Attributes Registers 1–8

(ROWARn)

Table 17-37 describes the fields of the ROWARs.

Table 17-36. ROWBARn Field Descriptions

Bits

Name

Description

0–11

—

Reserved

12–31

BADD Base address of outbound window. Source address that is the starting point for the outbound

translation window. The window must be aligned based on the size selected in the window size bits.

This corresponds to bits 0–19 of a 32-bit address.

11 12

15 16

19 20

25 26

REN 0

TFLOLV PCI

0 000 0

RDTYP

WRTYP

00 0000

SIZE

Reset

1000_0000_0000_0100_0100_0000_0001_1111

Offset

0xD_0C10

11 12

1516

1920

25 26

TFLOLV PCI

RDTYP

WRTYP

000000

SIZE

Reset

0000_0000_0000_0100_0100_0000_0001_1111

Offset

0xD_0C30, 0xD_0C50, 0xD_0C70, 0xD_0C90, 0xD_0CB0, 0xD_0CD0, 0xD_0CF0, 0xD_0D10

Table 17-37. ROWARn Field Descriptions

Bits

Name

Description

Window address translation enable. Note that for ROWAR0 this bit is read-only and hardwired to 1.

0 Address translation disabled

1 Address translation enabled

1–3

—

Reserved

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