MPC8540 datasheet(987/1302 Pages) FREESCALE

987 / 1302 page

Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

17-63

INASE Packet-not-accepted; S-bit parity error. (Bit reset, write-one-to-clear)

0 No packet-not-accepted; S-bit parity error condition

1 Received ack control symbol with packet-not-accepted of type ‘S-bit parity error’

INAGE Packet-not-accepted; general error. (Bit reset, write-one-to-clear)

0 No packet-not-accepted; general error condition

1 Received ack control symbol with packet-not-accepted of type ‘general error’

URE

Unexpected restart-from-retry symbol. (Bit reset, write-one-to-clear)

0 No unexpected restart-from-retry symbol

1 Received a restart-from-retry control symbol while in the OK state

UAE

Unsolicited ACK symbol. (Bit reset, write-one-to-clear)

0 No unsolicited ack symbol encountered

1 Received an ack control symbol while no packets are posted on the outstanding ack history queue

ABRE

Ack before restart-from-retry. (Bit reset, write-one-to-clear)

0 No ack before restart-from-retry

1 Received an ack control symbol after receiving an ack retry and before sending a restart-from-retry

UTE

Unexpected training symbol. (Bit reset, write-one-to-clear)

0 No unexpected training symbol

1 Received a training symbol while in the OK state

USE

Unexpected stomp symbol. (Bit reset, write-one-to-clear)

0 No unexpected stomp symbol

1 Received a stomp control symbol while there is no packet being received

ULE

Unexpected link response symbol. (Bit reset, write-one-to-clear)

0 No unexpected link response symbol

1 Received a link response control symbol while there is no outstanding request

UEE

Unexpected EOP symbol. (Bit reset, write-one-to-clear)

0 No unexpected EOP symbol

1 Received an EOP control symbol while there is no packet being received

LRE

Link request error. (Bit reset, write-one-to-clear)

0 No link request error

1 Received a link request control symbol before the previous link request has been serviced

FAE

Frame toggle alignment. (Bit reset, write-one-to-clear)

0 No frame toggle alignment problem

1 Received FRAME signal toggles at a non 32-bit boundary

FTEE

Frame toggle edge. (Bit reset, write-one-to-clear)

0 No frame toggle edge problem

1 Received FRAME signal toggles on the negative edge of the clock

ATE

Ack time-out. (Bit reset, write-one-to-clear)

0 No ack time-out condition

1 An ack control symbol is not received within the specified time-out interval.

Table 17-61. PREDR Field Descriptions (continued)

Bits

Name

Description

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