MPC8540 datasheet(990/1302 Pages) FREESCALE

990 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

17-66

Freescale Semiconductor

RapidIO Interface

Table 17-64 describes the fields of the OMR.

Table 17-64. OMR Field Descriptions

Bits

Name

Description

0–10

—

Reserved

DES_SEN Descriptor snoop enable

0 Snooping of processor core disabled

1 Snooping of the processor core when reading descriptors from memory enabled

12–15

—

Reserved

16–19

CIRQ_SIZ Circular descriptor queue size. Determines the number of descriptors that can be placed in the

circular queue without overflow.

0000 2

0001 4

0010 8

0011 16

0100 32

0101 64

0110 128 (4-Kbyte page boundary)

0111 256

1000 512

1001 1024

1010 2048

1011–1111 Reserved

20–21

—

Reserved

QOIE

Queue overflow interrupt enable. Only applicable to chaining mode

0 No QO interrupt generated

1 Generates an interrupt upon detection of a queue overflow (that is, the enqueue and dequeue

pointers are no longer equal after being incremented by software and the queue was full)

QFIE

Queue full interrupt enable. Only applicable to chaining mode.

0 No QF interrupt generated

1 Generates an interrupt when the queue transitions to full (that is, the enqueue and dequeue

pointers are equal after being incremented by software)

—

Reserved

QEIE

Queue empty interrupt enable. Only applicable to chaining mode

0 No QE interrupt generated

1 Generates an interrupt at the completion of all outstanding message operations (that is, the

enqueue and dequeue pointers are equal after an increment by the message unit controller)

EIE

Error interrupt enable

0 No interrupt is generated if a programming or transfer error is detected.

1 Generates an interrupt if a programming or transfer error is detected

27–28

—

Reserved

MUTM

Message unit transfer mode

0 Message unit is configured to be in chaining mode

1 Puts the message unit into direct mode. This means that software is responsible for placing

all the required parameters into necessary registers to start the message transmission.

MPC8540 Datasheet(PDF) 990 Page - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 990 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL