MPC8540 datasheet(993/1302 Pages) FREESCALE

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Memory Map/Register Definition

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

17-69

Figure 17-64. Outbound Descriptor Queue Dequeue Pointer Address

Table 17-66 describes the fields of the ODQDPAR.

17.3.3.1.4 Outbound Unit Source Address Register (OSAR)

The outbound unit source address register (OSAR), shown in Figure 17-65, indicates the address

from which the message unit controller is to read data. Software must ensure that this is a valid

local memory address. The address must be aligned to a double-word boundary, so the 3 lsbs are

reserved.

Figure 17-65. Outbound Unit Source Address Registers (OSAR)

Table 17-67 describes the fields of the OSAR.

26 27

DQDPA

000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_100C

Table 17-66. ODQDPAR Field Descriptions

Bits

Name

Description

0–26

DQDPA Descriptor queue dequeue pointer address. Contains the address of the first descriptor in memory

to process. The descriptor must be aligned to a 32-byte boundary.

27–31

—

Reserved

30 31

SAD

SNEN

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xD_1014

Table 17-67. OSAR Field Descriptions

Bits

Name

Description

0–28

SAD

Source address. This is the source address of the message operation.

SNEN Snoop enable

0 Snooping of the processor core disabled

1 Snooping of the processor core for data reads from local memory enabled

30–31

—

Reserved

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