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MPC8540 Datasheet(PDF) 995 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 995 Page - Freescale Semiconductor, Inc |
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995 / 1302 page ![]() Memory Map/Register Definition MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 17-71 17.3.3.1.7 Outbound Double-Word Count Register (ODCR) The outbound double-word count register (ODCR), shown in Figure 17-68, contains the number of double words for the message operation. The maximum message operation size is 4 Kbytes and the minimum is 8 bytes. Figure 17-68. Outbound Double-Word Count Register (ODCR) Table 17-70 describes the fields of the ODCR. 3— Reserved 4–5 DTFLOWLVL Transaction flow priority level 00 Lowest priority transaction flow 01 Next highest priority transaction flow 10 Highest priority transaction flow 11 Reserved 6–11 — Reserved 12–15 DWRITETTYPE Hardwired to 0110 (message) 16–21 — Reserved 22–29 DTGTROUTE Destination target route. Contains the target route field of the transaction (Device ID of the target) 30–31 — Reserved 0 18 19 28 29 31 R 0 0 0 000000 00000 0 0000 DCR 00 0 W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset 0xD_1020 Table 17-70. ODCR Field Descriptions Bits Name Description 0–18 — Reserved 19–28 DCR Double-word count register. Contains the number of double words for the message operation 00 0000 0000Reserved 00 0000 00018 bytes 00 0000 001016 bytes 00 0000 010032 bytes 00 0000 100064 bytes 00 0001 0000128 bytes 00 0010 0000256 bytes 00 0100 0000512 bytes 00 1000 00001024 bytes 01 0000 00002048 bytes 10 0000 00004096 bytes All other values yield undefined behavior. 29–31 — Reserved Table 17-69. ODATR Field Descriptions (continued) Bits Name Description |
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