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MPC8540 Datasheet(PDF) 1030 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 1030 Page - Freescale Semiconductor, Inc

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
17-106
Freescale Semiconductor
RapidIO Interface
17.7 ATMU (Address Translation and Mapping Unit)
Outbound address translation refers to the translation of an address from the local address space
to that of RapidIO. In the same context, inbound address translation and mapping refers to the
translation of an address from the external address space of RapidIO to the local address space
understood by the internal interfaces.
Although, the Parallel RapidIO Interconnect Specification allows for 48- and 64-bit addresses,
this implementation only supports 34-bit RapidIO addresses. Outbound and inbound window
misses use the window 0 register set by default. The size field in the attributes register of window
0 for both inbound and outbound translation is used to determine how much of the translation
address is used when the default window is selected. Overlapping window hits result in the use of
the lowest number window register set hit. For both inbound and outbound translation, the smallest
window size is 4 Kbytes and the largest is 4 Gbytes.
17.7.1 Outbound ATMU Translation
The nine outbound ATMU windows (0–8) perform the mapping from the internal 32-bit address
space to the 34-bit address space of RapidIO. They also map attributes such as transaction type
and priority level. Window 0 is always enabled and is used as the default window if the address
does not match one of the other eight windows. Overlapping outbound window hits result in the
use of the lowest number window register set hit. Note that OCeaN read types can only map to
Unsolicited
response without
data
A response without data is received while
there is no corresponding request that
matches that TID
Generates interrupt if enabled
(PNFEIER[URESIE] is cleared)
Information logged in
RapidIO capture register(s)
Unsolicited
response with data
A response with data is received while
there is no corresponding request that
matches that TID
Generates interrupt if enabled
(PNFEIER[URSDIE] is cleared)
Information logged in
RapidIO capture register(s)
Message error
response
Received a response of type error for an
outbound message packet
Generates interrupt if enabled
(PNFEIER[MERIE] is cleared)
Information logged in
RapidIO capture register(s)
Message descriptor
fetch error
A message descriptor fetch from local
memory gets an error (for example,
ECC).
Generates interrupt if enabled
(PNFEIER[MDFIE] is cleared)
No information logged in
RapidIO capture register(s)
Message size error
Received message packet data payload
is not of the size specified in the ssize
field (with the exception of the last packet
which may be less)
Generates interrupt if enabled
(PNFEIER[MSIE] is cleared)
Information logged in
RapidIO capture register(s)
Illegal transaction
target error
Received a packet whose target ID does
not match RapidIO deviceID while
accept_all mode is disabled
Generates interrupt if enabled
(PNFEIER[ITIE] is cleared)
Information logged in
RapidIO capture register(s)
Table 17-102. Fatal Errors Detected by RapidIO Controller (continued)
Error
Description
Action
Capture Registers



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