MPC8540 datasheet(1058/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

18-10

Freescale Semiconductor

Global Utilities

Table 18-9 describes the bit settings of GPPORCR.

18.4.1.7 General-Purpose I/O Control Register (GPIOCR)

Shown in Figure 18-7, GPIOCR contains the enable bits for each group of pins that may be used

for general-purpose I/O. These bits have meaning only if the pins are not being used for their

primary function. Note that when these signals are enabled as general-purpose I/O signals, they

are read and written through GPINDR and GPOUTDR described in Section 18.4.1.9,

“General-Purpose Input Data Register (GPINDR),” and Section 18.4.1.8, “General-Purpose

Output Data Register (GPOUTDR).” Section 18.5.2, “General-Purpose I/O Signals,” describes

the use of general-purpose I/O signals.

Table 18-10 describes the bit settings of GPIOCR.

Table 18-9. GPPORCR Field Descriptions

Bits

Name

Description

0–31 POR_CFG_VEC General-purpose POR configuration vector sampled from local bus address/data signals at

the negation of HRESET. Note that if nothing is driven on these signals during reset, the

value of this register is indeterminate.

R 0 0

00 0 0

Tx2out Rx2in

000000

PCIout PCIin

0 0 000000000000

Reset

0000_0000_0000_0000_0000_0000_0000_0000

Offset

0xE_0030

Figure 18-7. General-Purpose I/O Control Register (GPIOCR)

Table 18-10. GPIOCR Field Descriptions

Bits

Name

Description

0–5

—

Reserved

Tx2out TSEC2_Tx[0:7] output enable. Used to enable TSEC2_Tx[0:7] for use as general-purpose output if the

TSEC2 interface is disabled

0 TSEC2_Tx[0:7] is not used as general-purpose output.

1 TSEC2_Tx[0:7] is used as general-purpose output.

Rx2in

TSEC2_Rx[0:7] input enable. Used to enable TSEC2_Rx[0:7] for use as general-purpose input if the

TSEC2 interface is disabled

0 TSEC2_Rx[0:7] is not used as general-purpose input.

1 TSEC2_Rx[0:7] is used as general-purpose input.

8–13

—

Reserved

PCIout PCI_AD[47:40] output enable. Used to enable PCI_AD[47:40] for use as general-purpose output if PCI

interface is in 32-bit mode or is disabled

0 PCI_AD[47:40] is not used as general-purpose output.

1 PCI_AD[47:40] is used as general-purpose output.

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