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MPC8540 Datasheet(PDF) 1152 Page - Freescale Semiconductor, Inc |
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MPC8540 Datasheet(HTML) 1152 Page - Freescale Semiconductor, Inc |
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1152 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 21-12 Freescale Semiconductor 10/100 Fast Ethernet Controller 0x2_6328– 0x2_633C Reserved R 0x0000_0000 — 0x2_6340 MRBLR—Maximum receive buffer length register R/W 0x0000_0000 21.5.3.4.5/21-34 0x2_6344– 0x2_6380 Reserved R 0x0000_0000 — 0x2_6384 RBPTR—RxBD pointer register R/W 0x0000_0000 21.5.3.4.6/21-35 0x2_6388– 0x2_6400 Reserved R 0x0000_0000 — 0x2_6404 RBASE—RxBD base address register R/W 0x0000_0000 21.5.3.4.7/21-35 0x2_6408– 0x2_64FC Reserved R 0x0000_0000 — FEC MAC Registers 0x2_6500 MACCFG1—MAC configuration register 1 R/W 0x0000_0000 21.5.3.6.1/21-38 0x2_6504 MACCFG2—MAC configuration register 2 R/W 0x0000_7000 21.5.3.6.2/21-40 0x2_6508 IPGIFG—Inter-packet gap/inter-frame gap register R/W 0x4060_5060 21.5.3.6.3/21-41 0x2_650C HAFDUP—Half-duplex register R/W 0x00A0_F037 21.5.3.6.4/21-41 0x2_6510 MAXFRM—Maximum frame length register R/W 0x0000_0600 21.5.3.6.5/21-42 0x2_6514– 0x2_6538 Reserved R 0x0000_0000 — 0x2_653C IFSTAT—Interface status register R 0x0000_0000 21.5.3.6.6/21-43 0x2_6540 MACSTNADDR1—Station address register, part 1 R/W 0x0000_0000 21.5.3.6.7/21-43 0x2_6544 MACSTNADDR2—Station address register, part 2 R/W 0x0000_0000 21.5.3.6.8/21-44 0x2_6548– 0x2_67FC Reserved R 0x0000_0000 — FEC Hash Function Registers 0x2_6800 IADDR0—Individual address register 0 R/W 0x0000_0000 21.5.3.7.1/21-45 0x2_6804 IADDR1—Individual address register 1 R/W 0x0000_0000 0x2_6808 IADDR2—Individual address register 2 R/W 0x0000_0000 0x2_680C IADDR3—Individual address register 3 R/W 0x0000_0000 0x2_6810 IADDR4—Individual address register 4 R/W 0x0000_0000 0x2_6814 IADDR5—Individual address register 5 R/W 0x0000_0000 0x2_6818 IADDR6—Individual address register 6 R/W 0x0000_0000 0x2_681C IADDR7—Individual address register 7 R/W 0x0000_0000 0x2_6820– 0x2_687C Reserved R 0x0000_0000 — Table 21-3. Module Memory Map (continued) Offset Name Access 1 Reset Section/Page |
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