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MPC8540 Datasheet(PDF) 1157 Page - Freescale Semiconductor, Inc

Part # MPC8540
Description  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 Datasheet(HTML) 1157 Page - Freescale Semiconductor, Inc

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Memory Map/Register Definition
MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
21-17
Table 21-5 describes the fields of the IMASK register.
012
3
4
5
6
7
8
9
10
11
12
13
14
15
R
BREN RXCEN BSYEN EBERREN
0
MSROEN GTSCEN
BTEN
TXCEN TXEEN TXBEN TXFEN
0
LCEN
CRL/
XDAEN
XFUNEN
W
Reset
0000_0000_0000_0000
16
17
22
23
24
25
31
R
RXBEN
00
0
0
0
0
GRSCEN RXFEN
00
0
0
0
0
0
W
Reset
0000_0000_0000_0000
Offset
0x2_6014
Figure 21-6. IMASK Register Definition
Table 21-5. IMASK Field Descriptions
Bits
Name
Description
0
BREN
Babbling receiver interrupt enable
1
RXCEN
Receive control interrupt enable
2
BSYEN
Busy interrupt enable
3
EBERREN
Ethernet controller bus error enable
4—
Reserved
5
MSROEN
MSTAT register overflow interrupt enable
6
GTSCEN
Graceful transmit stop complete interrupt enable
7
BTEN
Babbling transmitter interrupt enable
8
TXCEN
Transmit control interrupt enable
9
TXEEN
Transmit error interrupt enable
10
TXBEN
Transmit buffer interrupt enable
11
TXFEN
Transmit frame interrupt enable
12
—
Reserved
13
LCEN
Late collision enable
14
CRL/XDAEN
Collision retry limit / excessive defer abort enable
15
XFUNEN
Transmit FIFO underrun enable
16
RXBEN
Receive buffer interrupt enable
17–22
—
Reserved
23
GRSCEN
Graceful receive stop complete interrupt enable
24
RXFEN
Receive frame interrupt enable
25–31
—
Reserved



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