MPC8540 datasheet(1170/1302 Pages) FREESCALE

1170 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

21-30

Freescale Semiconductor

10/100 Fast Ethernet Controller

Wrap. Written by user. This bit is ignored by FEC.

Interrupt. Written by user.

0 No interrupt is generated after this buffer is serviced.

1 IEVENT[TXF] is set after this buffer is serviced. Setting this bit can cause an interrupt if

IMASK[TXFEN] is enabled.

Last in frame. (The OSTBD is always the last in the frame, so L is always set).

Hardwired to a value of 1.

Tx CRC. Written by user. (Valid only while it is set in the first BD and OSTBD[PAD/CRC] is

cleared, MACCFG2[PAD/CRC] is cleared, and MACCFG2[CRC EN] is cleared.) If

MACCFG2[PAD/CRC] is set or MACCFG2[CRC EN] is set, a CRC is added to all frames and this

bit is ignored.

0 End transmission immediately after the last data byte, unless TxBD[PAD/CRC] is set.

1 Transmit the CRC sequence after the last data byte.

DEF

Defer indication. Written by the FEC.

Hardware updates this bit after transmitting a frame when used as a ‘defer indicator.’

Software/user updates this bit while building a transmit buffer descriptor if used as a ‘hardware

event indicator.’

0 This frame was not deferred.

1 This frame did not have a collision before it was sent but it was sent late because of deferring.

TO1

Transmit software ownership. This read/write bit may be utilized by software, as necessary. Its

state does not affect the hardware nor is it affected by the hardware.

HFE/LC

Huge frame enable (written by user)/Late collision (written by TSEC)

Huge frame enable. Written by user. Valid only while it is set in first BD and the MACCFG2[Huge

Frame] is cleared. If MACCFG2[Huge Frame] is set, this bit is ignored.

0 Truncate transmit frame if its length is greater than the MAC’s Maximum Frame Length register.

1 Do not truncate the transmit frame.

Late collision. Written by TSEC.

0 No late collision.

1 A collision occurred after 64 bytes are sent. The TSEC terminates the transmission and

updates LC.

Retransmission limit. Written by the FEC.

0 Transmission before maximum retry limit is hit.

1 The transmitter failed (maximum retry limit + 1 attempts to successfully send a message due

to repeated collisions). The FEC terminates the transmission and updates RL.

10–13

Retry count. Written by the FEC.

0 The frame is sent correctly the first time.

1 More than zero attempts where needed to send the transmit frame. When this field is 15, 15 or

more retries were needed. The Ethernet controller updates RC after sending the buffer.

Underrun. Written by the FEC.

0 No underrun encountered (data was retrieved from external memory in time to send a complete

frame).

1 The Ethernet controller encountered a transmitter underrun condition while sending the

associated buffer. The FEC terminates the transmission and updates UN.

—

Reserved

16–31 OSTBDLEN Out-of-sequence TxBD data length. Written by user. Data length is the number of octets the FEC

transmits from this BD’s data buffer. It is never modified by the FEC.

Table 21-20. OSTBD Field Descriptions (continued)

Bits

Name

Description

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