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PCA9306DC1/DG Datasheet(PDF) 8 Page - NXP Semiconductors

Part # PCA9306DC1/DG
Description  Dual bidirectional I2C-bus and SMBus voltage-level translator
PDF  38 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9306DC1/DG Datasheet(HTML) 8 Page - NXP Semiconductors

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NXP Semiconductors
PCA9306
Dual bidirectional I2C-bus and SMBus voltage-level translator
Tamb = -40 °C to +105 °C, unless otherwise specified. Values guaranteed by design.
CL = 50 pF
CL = 30 pF
CL = 15 pF
Symbol Parameter
Conditions
Min
Max
Min
Max
Min
Max
Unit
tPLH
LOW to HIGH
propagation delay
from (input) SCL2 or SDA2
to (output) SCL1 or SDA1
0
2.0
0
1.2
0
0.6
ns
tPHL
HIGH to LOW
propagation delay
from (input) SCL2 or SDA2
to (output) SCL1 or SDA1
0
2.5
0
1.5
0
0.75 ns
Table 8. Dynamic characteristics (translating down)...continued
Tamb = -40 °C to +105 °C, unless otherwise specified. Values guaranteed by design.
CL = 50 pF
CL = 30 pF
CL = 15 pF
Symbol Parameter
Conditions
Min
Max
Min
Max
Min
Max
Unit
VI(EN) = 3.3 V; VIH = 2.3 V; VIL = 0 V; VTT = 3.3 V; VM = 1.15 V; RL = 300 Ω (see Figure 8)
tPLH
LOW to HIGH
propagation delay
from (input) SCL1 or SDA1
to (output) SCL2 or SDA2
0
1.75
0
1.0
0
0.5
ns
tPHL
HIGH to LOW
propagation delay
from (input) SCL1 or SDA1
to (output) SCL2 or SDA2
0
2.75
0
1.65
0
0.8
ns
VI(EN) = 2.5 V; VIH = 1.5 V; VIL = 0 V; VTT = 2.5 V; VM = 0.75 V; RL = 300 Ω (see Figure 8)
tPLH
LOW to HIGH
propagation delay
from (input) SCL1 or SDA1
to (output) SCL2 or SDA2
0
1.75
0
1.0
0
0.5
ns
tPHL
HIGH to LOW
propagation delay
from (input) SCL1 or SDA1
to (output) SCL2 or SDA2
0
3.3
0
2.0
0
1.0
ns
Table 9. Dynamic characteristics (translating up)
002aab845
VTT
RL
S1
S2 (open)
CL
from output under test
a. Load circuit
002aab846
VIH
VIL
VM
VM
input
output
VOH
VOL
VM
VM
b. Timing diagram
S1 = translating up; S2 = translating down.
CL includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo = 50 Ω; tr ≤ 2 ns; tf ≤ 2
ns.
The outputs are measured one at a time, with one transition per measurement.
Figure 8. Load circuit for outputs
PCA9306
All information provided in this document is subject to legal disclaimers.
© 2022 NXP B.V. All rights reserved.
Product data sheet
Rev. 9.3 — 14 November 2022
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