PCA9306DC1SLASHDG datasheet(9/38 Pages) NXP

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NXP Semiconductors

PCA9306

Dual bidirectional I2C-bus and SMBus voltage-level translator

11 Application information

002aab847

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

8 EN

PCA9306

200 kΩ

RPU

Vpu(D) = 3.3 V(1)

I2C-BUS

DEVICE

SCL

SDA

VCC

GND

= 1.8 V(1)

Vref(1)

RPU

I2C-BUS

CONTROLLER

SCL

SDA

VCC

GND

1. The applied voltages at Vref(1) and Vpu(D) should be such that Vbias(ref)(2) is at least 1 V higher

than Vref(1) for best translator operation.

Figure 9. Typical application circuit (switch always enabled)

002aab848

SCL1

SDA1

VREF1

GND

VREF2

SCL2

SDA2

8 EN

PCA9306

200 k

RPU

Vpu(D) = 3.3 V

I2C-BUS

DEVICE

SCL

SDA

VCC

GND

Vref(1) = 1.8 V(1)

RPU

SCL

SDA

VCC

GND

off

3.3 V enable signal(1)

I2C-BUS

CONTROLLER

1. In the Enabled mode, the applied enable voltage and the applied voltage at Vref(1) should be

such that Vbias(ref)(2) is at least 1 V higher than Vref(1) for best translator operation.

Figure 10. Typical application circuit (switch enable control)

11.1 Bidirectional translation

For the bidirectional clamping configuration (higher voltage to lower voltage or lower

voltage to higher voltage), the EN input must be connected to VREF2 and both pins

pulled to HIGH side Vpu(D) through a pull-up resistor (typically 200 kΩ). This allows

VREF2 to regulate the EN input. A filter capacitor on VREF2 is recommended. The I2C-

PCA9306

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 9.3 — 14 November 2022

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